參數(shù)資料
型號(hào)： LPC2144FBD64
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學(xué)處理器
英文描述： Single-chip 16-bit-32-bit microcontrollers; up to 512 kB flash with ISP-IAP, USB 2.0 full-speed device, 10-bit ADC and DAC
封裝： LPC2141FBD64<SOT314-2 (LQFP64)|<<http://www.nxp.com/packages/SOT314-2.html<1<Always Pb-free,;LPC2142FBD64<SOT314-2 (LQFP64)|<<http://www.nxp.com/packages/SOT314-2.html<
文件頁(yè)數(shù)： 32/45頁(yè)
文件大?。?/td> 391K
代理商： LPC2144FBD64
LPC2141_42_44_46_48
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 5 — 12 August 2011
32 of 45
NXP Semiconductors
LPC2141/42/44/46/48
Single-chip 16-bit/32-bit microcontrollers
10. ADC electrical characteristics
[1]
The ADC is monotonic, there are no missing codes.
[2]
The differential linearity error (E
D
) is the difference between the actual step width and the ideal step width. See
Figure 8
.
The integral non-linearity (E
L(adj)
) is the peak difference between the center of the steps of the actual and the ideal transfer curve after
appropriate adjustment of gain and offset errors. See
Figure 8
.
[3]
[4]
The offset error (E
O
) is the absolute difference between the straight line which fits the actual curve and the straight line which fits the
ideal curve. See
Figure 8
.
[5]
The gain error (E
G
) is the relative difference in percent between the straight line fitting the actual transfer curve after removing offset
error, and the straight line which fits the ideal transfer curve. See
Figure 8
.
[6]
The absolute error (E
T
) is the maximum difference between the center of the steps of the actual transfer curve of the non-calibrated
ADC and the ideal transfer curve. See
Figure 8
.
[7]
See
Figure 9
.
Table 8.
V
DDA
= 2.5 V to 3.6 V; T
amb
=
40
C to +85
C unless otherwise specified; ADC frequency 4.5 MHz.
Symbol
Parameter
Conditions
V
IA
analog input voltage
C
ia
analog input capacitance
E
D
differential linearity error
V
SSA
= 0 V, V
DDA
= 3.3 V
E
L(adj)
integral non-linearity
V
SSA
= 0 V, V
DDA
= 3.3 V
E
O
offset error
V
SSA
= 0 V, V
DDA
= 3.3 V
E
G
gain error
V
SSA
= 0 V, V
DDA
= 3.3 V
E
T
absolute error
V
SSA
= 0 V, V
DDA
= 3.3 V
R
vsi
voltage source interface
resistance
ADC static characteristics
Min
0
-
Typ
-
-
-
-
-
-
-
-
Max
V
DDA
1
1
2
3
0.5
4
40
Unit
V
pF
LSB
LSB
LSB
%
LSB
k
[1][2]
-
[3]
-
[4]
-
[5]
-
[6]
-
[7]
-
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