參數(shù)資料
型號(hào)： LPC2119FBD64
廠(chǎng)商： NXP Semiconductors N.V.
元件分類(lèi)： 數(shù)學(xué)處理器
英文描述： Single-chip 16-32-bit microcontrollers; 64-128-256 kB ISP-IAP flash with 10-bit ADC and CAN
封裝： LPC2109FBD64/01<SOT314|<<<1<Always Pb-free,;LPC2119FBD64/01<SOT314-2 (LQFP64)|<<http://www.nxp.com/packages/SOT314-2.html<1<Always Pb-free,;LPC2129FBD64/01<SOT314-2
文件頁(yè)數(shù)： 16/46頁(yè)
文件大?。?/td> 291K
代理商： LPC2119FBD64
LPC2109_2119_2129
All information provided in this document is subject to legal disclaimers.
NXP B.V. 2011. All rights reserved.
Product data sheet
Rev. 7 — 14 June 2011
16 of 46
NXP Semiconductors
LPC2109/2119/2129
Single-chip 16/32-bit microcontrollers
UART1 is equipped with standard modem interface signals. This module also
provides full support for hardware flow control (auto-CTS/RTS).
6.10.2
UART features available in LPC2109/2119/2129/01 only
Compared to previous LPC2000 microcontrollers, UARTs in LPC2109/2119/2129/01
introduce a fractional baud rate generator for both UARTs, enabling these microcontrollers
to achieve standard baud rates such as 115200 Bd with any crystal frequency above
2 MHz. In addition, auto-CTS/RTS flow-control functions are fully implemented in
hardware.
Fractional baud rate generator enables standard baud rates such as 115200 Bd to be
achieved with any crystal frequency above 2 MHz.
Auto-bauding.
Auto-CTS/RTS flow-control fully implemented in hardware.
6.11 I
2
C-bus serial I/O controller
The I
2
C-bus is a bidirectional bus for inter-IC control using only two wires: a serial clock
line (SCL), and a serial data line (SDA). Each device is recognized by a unique address
and can operate as either a receiver-only device (e.g. an LCD driver or a transmitter with
the capability to both receive and send information (such as memory). Transmitters and/or
receivers can operate in either master or slave mode, depending on whether the chip has
to initiate a data transfer or is only addressed. The I
2
C-bus is a multi-master bus; it can be
controlled by more than one bus master connected to it.
The I
2
C-bus implemented in LPC2109/2119/2129 supports a bit rate up to 400 kbit/s (Fast
I
2
C-bus).
6.11.1
Features
Standard I
2
C-bus compliant interface.
Easy to configure as Master, Slave, or Master/Slave.
Programmable clocks allow versatile rate control.
Bidirectional data transfer between masters and slaves.
Multi-master bus (no central master).
Arbitration between simultaneously transmitting masters without corruption of serial
data on the bus.
Serial clock synchronization allows devices with different bit rates to communicate via
one serial bus.
Serial clock synchronization can be used as a handshake mechanism to suspend and
resume serial transfer.
The I
2
C-bus may be used for test and diagnostic purposes.
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LPC2119FBD64/00 制造商:PHILIPS 制造商全稱(chēng):NXP Semiconductors 功能描述:Single-chip 16/32-bit microcontrollers; 64/128/256 kB ISP/IAP flash with 10-bit ADC and CAN
LPC2119FBD64/01 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-64 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-64, Controller Family/Series:LPC2100, Core Size:16 制造商:NXP Semiconductors 功能描述:MCU, 16BIT/32BIT, 60MHZ, LQFP-64, Controller Family/Series:LPC2100, Core Size:16bit / 32bit, No. of I/O's:46, Supply Voltage Min:1.65V, Supply Voltage Max:1.95V, Digital IC Case Style:LQFP, No. of Pins:64, Program Memory Size:128KB,
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