參數(shù)資料
型號: LPC2101FBD48,151
廠商: NXP Semiconductors
文件頁數(shù): 31/37頁
文件大?。?/td> 0K
描述: IC ARM7 MCU FLASH 8K 48-LQFP
產(chǎn)品培訓(xùn)模塊: Migrating from 8/16-Bit MCUs to 32-Bit ARMs
ARM7 Architecture
ARM7 Memory
標(biāo)準(zhǔn)包裝: 250
系列: LPC2100
核心處理器: ARM7
芯體尺寸: 16/32-位
速度: 70MHz
連通性: I²C,Microwire,SPI,SSI,SSP,UART/USART
外圍設(shè)備: POR,PWM,WDT
輸入/輸出數(shù): 32
程序存儲器容量: 8KB(8K x 8)
程序存儲器類型: 閃存
RAM 容量: 2K x 8
電壓 - 電源 (Vcc/Vdd): 1.65 V ~ 3.6 V
數(shù)據(jù)轉(zhuǎn)換器: A/D 8x10b
振蕩器型: 內(nèi)部
工作溫度: -40°C ~ 85°C
封裝/外殼: 48-LQFP
包裝: 托盤
產(chǎn)品目錄頁面: 704 (CN2011-ZH PDF)
配用: 568-4310-ND - EVAL BOARD LPC2158 W/LCD
568-4297-ND - BOARD EVAL LPC21XX MCB2100
MCB2103UME-ND - BOARD EVAL MCB2103 + ULINK-ME
MCB2103U-ND - BOARD EVAL MCB2103 + ULINK2
622-1005-ND - USB IN-CIRCUIT PROG ARM7 LPC2K
其它名稱: 568-2092
935280963151
LPC2101FBD48-S
2010 Microchip Technology Inc.
DS39770C-page 37
PIC18F85J90 FAMILY
3.3
Clock Sources and
Oscillator Switching
Essentially, PIC18F85J90 family devices have three
independent clock sources:
Primary oscillators
Secondary oscillators
Internal oscillator
The primary oscillators can be thought of as the main
device oscillators. These are any external oscillators
connected to the OSC1 and OSC2 pins, and include
the External Crystal and Resonator modes and the
External Clock modes. In some circumstances, the
internal oscillator block may be considered a primary
oscillator. The particular mode is defined by the FOSC
Configuration bits. The details of these modes are
The secondary oscillators are external clock sources
that are not connected to the OSC1 or OSC2 pins.
These sources may continue to operate even after the
controller is placed in a power-managed mode.
PIC18F85J90 family devices offer the Timer1 oscillator
as a secondary oscillator source. This oscillator, in all
power-managed modes, is often the time base for
functions such as a Real-Time Clock. The Timer1
oscillator is discussed in greater detail in Section 12.3
In addition to being a primary clock source in some
circumstances, the internal oscillator is available as a
power-managed mode clock source. The INTRC
source is also used as the clock source for several
special features, such as the WDT and Fail-Safe Clock
Monitor. The internal oscillator block is discussed in
The PIC18F85J90 family includes features that allow
the device clock source to be switched from the main
oscillator, chosen by device configuration, to one of the
alternate clock sources. When an alternate clock
source is enabled, various power-managed operating
modes are available.
REGISTER 3-2:
OSCTUNE: OSCILLATOR TUNING REGISTER
R/W-0
INTSRC
PLLEN(1)
TUN5
TUN4
TUN3
TUN2
TUN1
TUN0
bit 7
bit 0
Legend:
R = Readable bit
W = Writable bit
U = Unimplemented bit, read as ‘0’
-n = Value at POR
‘1’ = Bit is set
‘0’ = Bit is cleared
x = Bit is unknown
bit 7
INTSRC: Internal Oscillator Low-Frequency Source Select bit
1
= 31.25 kHz device clock derived from 8 MHz INTOSC source (divide-by-256 enabled)
0
= 31 kHz device clock derived from INTRC 31 kHz oscillator
bit 6
PLLEN: Frequency Multiplier PLL Enable bit(1)
1
= PLL enabled
0
= PLL disabled
bit 5-0
TUN<5:0>: Fast RC Oscillator (INTOSC) Frequency Tuning bits
011111
= Maximum frequency
000001
000000
= Center frequency. Fast RC oscillator is running at the calibrated frequency.
111111
100000
= Minimum frequency
Note 1:
Available only for ECPLL and HSPLL oscillator configurations; otherwise, this bit is unavailable and reads
as ‘0’.
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