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參數(shù)資料
| 型號： | LP621024DM-55LL |
| 廠商： | AMIC Technology Corporation |
| 英文描述： | 128K X 8 BIT CMOS SRAM |
| 中文描述： | 128K的× 8位CMOS的SRAM |
| 文件頁數(shù)： | 5/16頁 |
| 文件大小： | 183K |
| 代理商： | LP621024DM-55LL |
LP621024D Series
(August, 2001, Version 1.0)
5
AMIC Technology, Inc.
AC Characteristics
(T
A
= 0
°
C to + 70
°
C, VCC = 5V
±
10%)
Symbol
Parameter
LP621024D-55LL
LP621024D-70LL
Unit
Min.
Max.
Min.
Max.
Read Cycle
t
RC
Read Cycle Time
55
-
70
-
ns
t
AA
Address Access Time
-
55
-
70
ns
t
ACE1
Chip Enable Access Time
CE1
-
55
-
70
ns
t
ACE2
CE2
-
55
-
70
ns
t
OE
Output Enable to Output Valid
-
30
-
35
ns
t
CLZ1
Chip Enable to Output in Low Z
CE1
10
-
10
-
ns
t
CLZ2
CE2
10
-
10
-
ns
t
OLZ
Output Enable to Output in Low Z
5
-
5
-
ns
t
CHZ1
Chip Disable to Output in High Z
CE1
0
20
0
25
ns
t
CHZ2
CE2
0
20
0
25
ns
t
OHZ
Output Disable to Output in High Z
0
20
0
25
ns
t
OH
Output Hold from Address Change
5
-
5
-
ns
Write Cycle
t
WC
Write Cycle Time
55
-
70
-
ns
t
CW
Chip Enable to End of Write
50
-
60
-
ns
t
AS
Address Setup Time
0
-
0
-
ns
t
AW
Address Valid to End of Write
50
-
60
-
ns
t
WP
Write Pulse Width
40
-
50
-
ns
t
WR
Write Recovery Time
0
-
0
-
ns
t
WHZ
Write to Output in High Z
0
25
0
30
ns
t
DW
Data to Write Time Overlap
25
-
30
-
ns
t
DH
Data Hold from Write Time
0
-
0
-
ns
t
OW
Output Active from End of Write
5
-
5
-
ns
Notes: t
CHZ1
, t
CHZ2
, t
OHZ
, and t
WHZ
are defined as the time at which the outputs achieve the open circuit condition and are
not referred to output voltage levels.
相關PDF資料 |
PDF描述 |
|---|---|
| LP621024DM-70LL | 128K X 8 BIT CMOS SRAM |
| LP621024D-55LL | 128K X 8 BIT CMOS SRAM |
| LP621024DV-70LL | 128K X 8 BIT CMOS SRAM |
| LP621024DV-55LL | 128K X 8 BIT CMOS SRAM |
| LP621024DX-70LL | 128K X 8 BIT CMOS SRAM |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| LP621024DM-55LLI | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DM-55LLT | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DM-70LL | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DM-70LLI | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
| LP621024DM-70LLT | 制造商:AMICC 制造商全稱:AMIC Technology 功能描述:128K X 8 BIT CMOS SRAM |
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