參數(shù)資料
型號: LP5551SQX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號調(diào)理
英文描述: PowerWise⑩ Technology Compliant Energy Management Unit
中文描述: SPECIALTY ANALOG CIRCUIT, QCC36
封裝: LLP-36
文件頁數(shù): 18/32頁
文件大?。?/td> 3081K
代理商: LP5551SQX
R3 - Status Register
Address 0x3
Type Read Only
Reset Default 8h’0F
Bit
7
6
5
4
3
2
1
0
Field Name
Reserved
Reserved
User Bit
User Bit
Fixed OK
IO OK
Memory OK
Core OK
Description or Comment
Reserved, read returns 0
Reserved, read returns 0
Unused, read returns 0
Unused, read returns 0
Unused, read returns 1
Unused, read returns 1
Unused, read returns 1
Unused, read returns 1
R4 - PWI Version Number Register
Address 0x4
Type Read Only
Reset Default 8h’01
Bit
7:0
Field Name
Version
Description or Comment
Read transaction will return 8h’01 indicating PWI 1.0 specification. Write
transactions to this register are ignored.
R5 - N-Well Bias Register
Address 0x5
Type R/W
Reset Default 8h’00
Bit
7
Field Name
Sign
Description or Comment
1: Negative offset
0: Positive offset
Sign Data Code [7]
6:2
Voltage
Voltage Data Code [6:2] Voltage Offset from core
voltage
1 V
0.042 - 1 V, 0.042 V steps
A
ctive clamp to
SW_AVS (default)
0V
-0.021 – -0.315V, -0.021
V steps
-0.315 V
0
5h’19 – 5h’1f
5h’01 – 5h’18
5h’00
1
5h’00
5h’01 – 5h’0f
5h’10 –5h’1f
0:1
Unused
R6 - P-Well Bias Register
Address 0x6
Type R/W
Reset Default 8h’00
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