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參數(shù)資料
| 型號(hào)： | LP5550SQ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | PowerWise Technology Compliant Energy Management Unit |
| 中文描述： | 0.75 A SWITCHING REGULATOR, 1360 kHz SWITCHING FREQ-MAX, QCC16 |
| 封裝： | LLP-16 |
| 文件頁數(shù)： | 23/25頁 |
| 文件大?。?/td> | 1056K |
| 代理商： | LP5550SQ |
Application Information
(Continued)
OUTPUT CAPACITOR
The switching converter in the LP5550 is designed to be
used with a 10uF ceramic output capacitor. The dielectric
should be X5R, X7R, or comparable material to maintain
proper tolerances. The output capacitor of the switching
converter absorbs the AC ripple current from the inductor
and provides the initial response to a load transient. The
ripple voltage at the output of the converter is the product of
the ripple current flowing through the output capacitor and
the impedance of the capacitor. The impedance of the ca-
pacitor can be dominated by capacitive, resistive, or induc-
tive elements within the capacitor, depending on the fre-
quency of the ripple current. Ceramic capacitors are
predominately used in portable systems and have very low
ESR and remain capacitive up to high frequencies.
The switcher peak - to - peak output voltage ripple in steady
state can be calculated as:
LDO INFORMATION
The LDOs included in the LP5550 provide static supply
voltages for various functions in the processor. Use the
following sections to determine loading and external compo-
nents.
LDO LOADING CAPABILITY
The LDOs in the LP5550 can regulate to a variety of output
voltages, depending on the need of the processor. These
voltages can be programmed through the PWI. Table 1
summarizes the parameters of the LP5550 LDOs.
TABLE 1. LDO Parameters
PWI Register
R8
R7
R2
Output voltage
range
0.6 V – 2.2 V
1.5 V – 3.3 V
V
OSW
+ 0.05 V
1
0.7 V – 1.35 V
2
Recommended
Maximum Output
Current
100 mA
250 mA
50 mA
Dropout Voltage
(typical)
200 mV
150 mV
200 mV
Typical Load
PLL
I/O
Memory/Memory
retention
LDO1
LDO2
LDO3
1. LDO3 tracks the switching converter output voltage (V
OSW
) plus a 50 mV offset when the LP5550 is in active state.
2. LDO3 regulates at the set memory retention voltage when the LP5550 is in shutdown state.
LDO OUTPUT CAPACITOR
The output capacitor sets a low frequency pole and a high
frequency zero in the control loop of an LDO. The capaci-
tance and the equivalent series resistance (ESR) of the
capacitor must be within a specified range to meet stability
requirements. The LDOs in the LP5550 are designed to be
used with ceramic output capacitors. The dielectric should
be X5R, X7R, or comparable material to maintain proper
tolerances. Use the following table to choose a suitable
output capacitor:
TABLE 2. Output Capacitor Selection Guide
Output Capacitance Range
(Recommended Typical Value)
1 μF – 20 μF (2.2 μF)
2 μF – 20 μF (4.7 μF)
0.7 μF – 2.2 μF (1.0 μF)
ESR range
5 mohm – 500 mohm
5 mohm – 500 mohm
5 mohm– 500 mohm
LDO1
LDO2
LDO3
L
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| LP5550SQX | PowerWise Technology Compliant Energy Management Unit |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LP5550SQ/NOPB | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| LP5550SQX | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| LP5550SQX/NOPB | 功能描述:電池管理 RoHS:否 制造商:Texas Instruments 電池類型:Li-Ion 輸出電壓:5 V 輸出電流:4.5 A 工作電源電壓:3.9 V to 17 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:VQFN-24 封裝:Reel |
| LP5551 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PowerWise⑩ Technology Compliant Energy Management Unit |
| LP5551SQ | 功能描述:PMIC 解決方案 RoHS:否 制造商:Texas Instruments 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:QFN-24 封裝:Reel |
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