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參數(shù)資料
| 型號： | LP5550SQ |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | PowerWise Technology Compliant Energy Management Unit |
| 中文描述： | 0.75 A SWITCHING REGULATOR, 1360 kHz SWITCHING FREQ-MAX, QCC16 |
| 封裝： | LLP-16 |
| 文件頁數(shù)： | 14/25頁 |
| 文件大小： | 1056K |
| 代理商： | LP5550SQ |
LP5550 PWI Register Map
Summary
(Continued)
(Continued)
Register
Address
0xA
0xB
0xC
0xD
0xE
0xF
Register
Name
R10
R11
R12
R13
R14
R15
Register Usage
Unused
Unused
Unused
Unused
Unused
Reserved
Type
R/W
R/W
R/W
R/W
R/W
R/W
Reset Default Value
7
6
-
-
-
-
-
-
-
-
-
-
-
-
5
-
-
-
-
-
-
4
-
-
-
-
-
-
3
-
-
-
-
-
-
2
-
-
-
-
-
-
1
-
-
-
-
-
-
0
-
-
-
-
-
-
R0 - Core Voltage Register
Address 0x0
Type R/W
Reset Default 8h’7F
Bit
7
Field Name
Sign
Description or Comment
This bit is fixed to ‘0’. Reading this bit will result in a ‘0’. Any data written into
this bit position using the Register Write command is ignored.
Core voltage value. Default value is in
bold
.
Voltage Data Code [7:0]
7h’00
7h’xx
7h’7f
6:0
Voltage
Voltage Value (V)
0.6
Linear scaling
1.2
(default)
R1 - Unused Register
Address 0x1
Type R/W
Reset Default 8h’00
Bit
7:0
Field Name
Unused
Description or Comment
Write transactions to this register are ignored. Read transactions will
return a “No Response Frame.” A no response frame contains all
zeros (see PWI 1.0 specification).
R2 – VO3 Voltage Register (Memory Retention Voltage)
Address 0x2
Type R/W
Reset Default 8h’60
Bit
7
Field Name
Sign
Description or Comment
This bit is fixed to ‘0’. Reading this bit will result in a ‘0’. Any data written into
this bit position using the Register Write command is ignored.
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