參數(shù)資料
型號(hào): LP3928TL-1828
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SUBMINIATURE PC BOARD RELAY
中文描述: SPECIALTY ANALOG CIRCUIT, PBGA16
封裝: MICRO SMD, 16 PIN
文件頁數(shù): 7/11頁
文件大小: 240K
代理商: LP3928TL-1828
Electrical Characteristics
Unless otherwise specified: H = V
IH
min, L = V
IL
max, C
VBAT
= 1 μF, I
OUT
= 1 mA,
C
VCCB
= 1 μF, C
= 1 μF. Typical values and limits appearing in standard typeface apply for T
= 25C. Limits appearing in
boldface type
apply over the entire junction temperature range for operation, 40C to +125C. (Note 9) (Continued)
LDO Electrical Characteristics
(Continued)
Unless otherwise specified: EN1 = L, EN2 = H; V
OUTnom
= 2.85V, V
BAT
= V
OUT(nom)
+ 0.5V.
Symbol
Parameter
Conditions
Typical
Limit
Units
Min
Max
PSRR
Power Supply Rejection Ratio
(Note 29)
V
BAT
= V
OUT(nom)
+ 1V,
f = 1 kHz, I
OUT
= 50 mA, (
Figure 2
)
V
BAT
= V
OUT(nom)
+ 1V,
f = 50 kHz, I
OUT
= 50 mA, (
Figure 2
)
I
OUT
= 1mA
I
OUT
= 1 mA to 150 mA
I
OUT
= 1 mA
I
OUT
= 50 mA
I
OUT
= 100 mA
I
OUT
= 150 mA
V
BAT
= 6V, Output Grounded (Steady
State)
V
OUT
V
OUT(nom)
5%, V
BAT
= 6V
40
dB
20
I
Q
Quiescent Current
85
130
0.4
20
45
60
500
150
200
2
35
70
100
μA
V
DO
Dropout Voltage (Note 22)
mV
I
SC
Short Circuit Current Limit
mA
I
OUT(PK)
T
ON
Peak Output Current
Turn-On Time (Note 23) (Note
29)
Output Noise Density
Output Noise Voltage
Output Filter Capacitance
(Note 24)
Output Filter Capacitance ESR
(Note 25)
Thermal Shutdown Temperature
(Note 26)
Thermal Shutdown Hysteresis
460
200
200
130
mA
μs
430
ρ
n (1/f)
e
n
Output
Capacitor
f = 1 kHz, C
OUT
= 1 μF
BW = 10 Hz to 100 kHz, C
OUT
= 1 μF
V
BAT
= 3.05V to 6V,
I
OUT
= 1mA to 150 mA
V
BAT
= 3.05V to 6V,
I
OUT
= 1mA to 150 mA
0.6
45
μV/
Hz
μVrms
μF
1
22
5
500
m
Thermal
Shutdown
160
C
20
C
Note 3:
Absolute Maximum Ratings are limits beyond which damage to the device may occur. Operating Ratings are conditions under which operation of the device
is guaranteed. Operating Ratings do not imply guaranteed performance limits. For guaranteed performance limits and associated test condition, see Electrical
Characteristics tables.
Note 4:
All voltages are with respect to the potential at the GND pin.
Note 5:
The Absolute Maximum power dissipation depends on the ambient temperature and can be calculated using the formula
P = (T
J
T
A
)/
θ
JA
,
Where T
J
is the junction temperature, T
A
is the ambient temperature, and
θ
JA
is the junction-to-ambient thermal resistance. The 360 mW rating appearing under
Absolute Maximum Ratings results from substituting the Absolute Maximum junction temperature, 150C, for T
J
, 85C for T
A
, and 180C/W for
θ
JA
. More power can
be dissipated safely at ambient temperatures below 85C. The thermal resistance can be better or worse than 180C/W depending on board layout. Larger copper
planes and thermal vias should be used to conduct heat away from the micro SMD solder bumps.
Note 6:
The Human Body Model is 100 pF discharged through 1.5 k
resistor into each pin.
Note 7:
V
CCB
can be supplied from an external voltage source in the range of 1.65V to 3.6V, as long as both V
BAT
and V
CCB
are connected to the external source.
Only the LDO quiescent current (see DC electrical specifications) will add to the level-shifter current consumption. This Operating Rating does not imply guaranteed
performance. For guaranteed performance limits and associated test conditions, see Electrical Characteristics tables.
Note 8:
Like the Absolute Maximum power dissipation, the maximum power dissipation for operation depends on the ambient temperature. The 220 mW rating
appearing under Operating Ratings results from substituting the maximum junction temperature for operation, 125C, for T
J
, 85C for T
A
, and 180C/W for
θ
JA
into
(1) above. More power can be dissipated at ambient temperatures below 85C. The thermal resistance can be better or worse than 180C/W depending on board
layout. Larger copper planes and thermal vias should be used to conduct heat away from the micro SMD solder bumps.
Note 9:
All limits are guaranteed. All electrical characteristics having room-temperature limits are tested during production with T
J
= 25C or correlated using
Statistical Quality Control (SQC) methods. All hot and cold limits are guaranteed by correlating the electrical characteristics to process and temperature variations
and applying statistical process control.
Note 10:
The target output voltage, which is labeled V
OUT(target)
, is the desired or ideal output voltage. The nominal output voltage, which is labeled V
OUT(nom)
, is
the output voltage measured with the input 0.5V above V
OUT(target)
and a 1 mA load.
Note 11:
Input leakage current for pins DIRi, EN1, EN2.
Note 12:
Input leakage current for pins Bi, LatchClk.
Note 13:
This is the static current consumption from V
CCB
for channel (i) when DIRi=H (A
B direction).
Note 14:
This is the static current consumption from V
CCB
for channel (i) when DIRi=L (B
A direction).
Note 15:
This is the static current consumption from V
CCB
for the part common to the channels.
(1)
L
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