參數(shù)資料
型號(hào): LP2975AIMMX-3.3/NOPB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO8
封裝: MINI, SOP-8
文件頁數(shù): 5/20頁
文件大?。?/td> 1135K
代理商: LP2975AIMMX-3.3/NOPB
Application Hints (Continued)
of 0.3–0.5C/W. The best source of information for this is
heatsink catalogs (Wakefield, AAVID, Thermalloy) since they
also sell mounting hardware.
θ
S-A is the heatsink-to-ambient thermal resistance, which
defines how well a heatsink transfers heat into the air. Once
this is determined, a heatsink must be selected which has a
value which is less than or equal to the computed value. The
value of
θ
S-A is usually listed in the manufacturer’s data
sheet for a heatsink, but the information is sometimes given
in a graph of temperature rise vs. dissipated power.
DESIGN EXAMPLE: A design is to be done which takes
3.3V in and provides 2.5V out at a load current of 7A. The
power dissipation will be calculated for both normal opera-
tion and short circuit conditions.
For normal operation:
P
D =(VIN VOUT)xILOAD = 5.6W
If the output is shorted to ground:
P
D(SC) = VIN xISC = 3.3 x 7.7 = 25.4W
(Assuming that a sense resistor is selected to set the value
of I
SC 10% above the nominal 7A).
θ
J-A will be calculated assuming a maximum TA of 70C and
a maximum T
J of 150C:
θ
J-A =(TJ TA)/PD(MAX)
For normal operation:
θ
J-A = (150 70) / 5.6 = 14.3C/W
For designs which must operate with the output shorted to
ground:
θ
J-A = (150 70) / 25.4 = 3.2C/W
The value of 14.3C/W can be easily met using a TO-220
device. Calculating the value of
θ
S-A required (assuming a
value of
θ
J-C = 3C/W and
θ
C-S = 1C/W):
θ
S-A =
θ
J-A (
θ
J-C +
θ
C-S)
θ
S-A =14.3(3+1)= 10.3C/W
Any heatsink may be used with a thermal resistance
10.3C/W @ 5.6W power dissipation (refer to manufacturer’s
data sheet curves). Examples of suitable heatsinks are Ther-
malloy #6100B and IERC #LATO127B5CB.
However, if the design must survive a sustained short on the
output, the calculated
θ
J-A value of 3.2C/W eliminates the
possibility of using a TO-220 package device.
Assuming a TO-3 device is selected with a
θ
J-C value of
1.5C/W and
θ
C-S = 0.4C/W, we can calculate the required
value of
θ
S-A:
θ
S-A =
θ
J-A (
θ
J-C +
θ
C-S)
θ
S-A = 3.2 (1.5 + 0.4) = 1.3C/W
A
θ
S-A value
≤1.3C/W would require a relatively large heat-
sink, or possibly some kind of forced airflow for cooling.
SHORT-CIRCUIT CURRENT LIMITING
Short-circuit current limiting is easiliy implemented using a
single external resistor (R
SC). The value of RSC can be
calculated from:
R
SC =VCL /ISC
Where:
I
SC is the desired short circuit current.
V
CL is the current limit sense voltage.
The value of V
CL is 57 mV (typical), with guaranteed limits
listed in the Electrical Characteristics section. When doing a
worst-case calculation for power dissipation in the FET, it is
important to consider both the tolerance of V
CL and the
tolerance (and temperature drift) of R
SC.
For maximum accuracy, the INPUT and CURRENT LIMIT
pins must be Kelvin connected to R
SC,
to avoid errors
caused by voltage drops along the traces carrying the cur-
rent from the input supply to the Source pin of the FET.
EXTERNAL CAPACITORS
The best capacitors for use in a specific design will depend
on voltage and load current (examples of tested circuits for
several different output voltages and currents are provided in
a previous section.)
Information in the next sections is provided to aid the de-
signer in the selection of the external capacitors.
Input Capacitor
Although not always required, an input capacitor is recom-
mended. Good bypassing on the input assures that the
regulator is working from a source with a low impedance,
which improves stability. A good input capacitor can also
improve transient response by providing a reservoir of stored
energy that the regulator can utilize in cases where the load
current demand suddenly increases. The value used for C
IN
may be increased without limit. Refer to the Reference De-
signs section for examples of input capacitors.
Output Capacitor
The output capacitor is required for loop stability (compen-
sation) as well as transient response. During sudden
changes in load current demand, the output capacitor must
source or sink current during the time it takes the control loop
of the LP2975 to adjust the gate drive to the pass FET. As a
general rule, a larger output capacitor will improve both
transient response and phase margin (stability). The value of
C
OUT may be increased without limit.
OUTPUT CAPACITOR AND COMPENSATION: Loop com-
pensation for the LP2975 is derived from C
OUT and, in some
cases, the feed-forward capacitor C
F (see next section).
C
OUT forms a pole (referred to as fp) in conjuction with the
load resistance which causes the loop gain to roll off (de-
crease) at an additional 20 dB/decade. The frequency of
the pole is:
f
p =0.16/[(RL +ESR)xCOUT]
Where:
R
L is the load resistance.
C
OUT is the value of the output capacitor.
ESR is the equivalent series resistance of C
OUT.
As a general guideline, the frequency of f
p should be
≤ 200
Hz. It should be noted that higher load currents correspond
to lower values of R
L, which requires that COUT be increased
to keep f
p at a given frequency.
DESIGN EXAMPLE: Select the minimum required output
capacitance for a design whose output specifications are 5V
@ 1A:
f
p =0.16/[(RL +ESR)xCOUT]
Re-written:
C
OUT =0.16/[fp x(RL + ESR) ]
Values used for the calculation:
f
p = 200 Hz, RL =5
, ESR = 0.1 (assumed).
Solving for C
OUT,weget 157 F (nearest standard size
would be 180 F).
LP2975
www.national.com
13
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