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參數(shù)資料
| 型號(hào)： | LMX2487ESQX |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | XO, clock |
| 英文描述： | 7.5 GHz High Performance Delta-Sigma Low Power Dual PLLatinum⑩ Frequency Synthesizers with 3.0 GHz Integer PLL |
| 中文描述： | PLL FREQUENCY SYNTHESIZER, 7500 MHz, PQCC24 |
| 封裝： | 4 X 4 MM, 0.80 MM HEIGHT, LLP-24 |
| 文件頁(yè)數(shù)： | 33/38頁(yè) |
| 文件大?。?/td> | 419K |
| 代理商： | LMX2487ESQX |
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2.6 R5 REGISTER
REGISTER
23
22
21
20
19
18
17
16
15
14
13
12
11
10
9
8
7
6
5
4
3
2
1
0
DATA[19:0]
C3
1
C2
0
C1
1
C0
1
R5
RF_FD[21:12]
RF_FN[21:12]
2.6.1 Fractional Numerator Determination { RF_FN[21:12], RF_FN[11:0], ACCESS[1] }
In the case that the ACCESS[1] bit is 0, then the part operates in 12-bit fractional mode, and the RF_FN2[21:12] bits become do
not care bits. When the ACCESS[1] bit is set to 1, the part operates in 22-bit mode and the fractional numerator is expanded from
12 to 22-bits.
Fractional
Numerator
0
1
...
4095
4096
...
4194303
RF_FN[21:12]
RF_FN[11:0]
( These bits only apply in 22- bit mode)
In 12- bit mode, these are do not care.
In 22- bit mode, for N <4096,
these bits should be all set to 0.
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
1
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
1
.
1
2.6.2 Fractional Denominator Determination { RF_FD[21:12], RF_FD[11:0], ACCESS[1]}
In the case that the ACCESS[1] bit is 0, then the part is operates in the 12-bit fractional mode, and the RF_FD[21:12] bits become
do not care bits. When the ACCESS[1] is set to 1, the part operates in 22-bit mode and the fractional denominator is expanded
from 12 to 22-bits.
Fractional
Denominator
0
1
...
4095
4096
...
4194303
RF_FD[21:12]
RF_FD[11:0]
( These bits only apply in 22- bit mode)
In 12- bit mode, these are do not care.
In 22- bit mode, for N <4096,
these bits should be all set to 0.
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
0
.
1
0
.
1
0
1
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
0
.
1
1
.
1
33
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMX2487ESQX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2487SQ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum? Frequency Synthesizers with 3.0 GHz Integer PLL |
| LMX2487SQ/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
| LMX2487SQX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:3.0 GHz - 6.0 GHz High Performance Delta-Sigma Low Power Dual PLLatinum? Frequency Synthesizers with 3.0 GHz Integer PLL |
| LMX2487SQX/NOPB | 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray |
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