參數(shù)資料
型號(hào): LMX2486
廠商: National Semiconductor Corporation
英文描述: 1.0 GHz - 4.5 GHz High Performance Delta-Sigma Low Power Dual PLLatinum TM Frequency Synthesizers with 3.0 GHz Integer PLL
中文描述: 1.0千兆赫- 4.5吉赫高性能Δ-Σ低功耗雙PLLatinum商標(biāo)頻率合成器與整數(shù)的3.0 GHz鎖相環(huán)
文件頁(yè)數(shù): 31/37頁(yè)
文件大小: 870K
代理商: LMX2486
Programming Description
(Continued)
2.5 R4 REGISTER
This register controls the conditions for the RF PLL in Fastlock.
REGISTER
23
22 21 20 19 18 17 16 15 14 13
12
11
10
9
8
7 6 5 4
3
2
1
0
DATA[19:0]
FM
[1:0]
C3 C2 C1 C0
R4
ATPU
0
1
0
0
0
DITH
[1:0]
0
OSC_
2X
OSC_
OUT
IF_
CPP
RF_
CPP
IF_P
MUX
[3:0]
1
0
0
1
2.5.1 MUX[3:0] Frequency Out & Lock Detect MUX
These bits determine the output state of the Ftest/LD pin.
MUX[3:0]
Output Type
High Impedance
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Open Drain
Open Drain
Open Drain
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Push-Pull
Output Description
Disabled
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
General purpose output, Logical “High” State
General purpose output, Logical “Low” State
RF & IF Digital Lock Detect
RF Digital Lock Detect
IF Digital Lock Detect
RF & IF Analog Lock Detect
RF Analog Lock Detect
IF Analog Lock Detect
RF & IF Analog Lock Detect
RF Analog Lock Detect
IF Analog Lock Detect
IF R Divider divided by 2
IF N Divider divided by 2
RF R Divider divided by 2
RF N Divider divided by 2
2.5.2 IF_P -- IF Prescaler
When this bit is set to 0, the 8/9 prescaler is used. Otherwise the 16/17 prescaler is used.
IF_P
0
1
IF Prescaler
8/9
16/17
Maximum Frequency
2300 MHz
3000 MHz
2.5.3 RF_CPP -- RF PLL Charge Pump Polarity
RF_CPP
0
1
RF Charge Pump Polarity
Negative
Positive (Default)
2.5.4 IF_CPP -- IF PLL Charge Pump Polarity
For a positive phase detector polarity, which is normally the case, set this bit to 1. Otherwise set this bit for a negative phase
detector polarity.
IF_CPP
0
1
IF Charge Pump Polarity
Negative
Positive
2.5.5 OSC_OUT Oscillator Output Buffer Enable
OSC_OUT
0
1
OSCout Pin
Disabled (High Impedance)
Buffered output of OSCin pin
L
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LMX2486EVAL 功能描述:時(shí)鐘和定時(shí)器開(kāi)發(fā)工具 LMX2486 EVAL BOARD RoHS:否 制造商:Texas Instruments 產(chǎn)品:Evaluation Modules 類(lèi)型:Clock Conditioners 工具用于評(píng)估:LMK04100B 頻率:122.8 MHz 工作電源電壓:3.3 V
LMX2486SQ 制造商:Texas Instruments 功能描述:PLL Frequency Synthesizer Dual 5MHz to 4500MHz 24-Pin LLP EP T/R
LMX2486SQ/NOPB 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray
LMX2486SQX 制造商:Texas Instruments 功能描述:PLL Frequency Synthesizer Dual 5MHz to 4500MHz 24-Pin LLP EP T/R
LMX2486SQX/NOPB 功能描述:鎖相環(huán) - PLL RoHS:否 制造商:Silicon Labs 類(lèi)型:PLL Clock Multiplier 電路數(shù)量:1 最大輸入頻率:710 MHz 最小輸入頻率:0.002 MHz 輸出頻率范圍:0.002 MHz to 808 MHz 電源電壓-最大:3.63 V 電源電壓-最小:1.71 V 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 封裝 / 箱體:QFN-36 封裝:Tray