參數(shù)資料
型號(hào): LMX2377UTMX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: XO, clock
英文描述: PLLatinum⑩ Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 2500 MHz, PDSO20
封裝: PLASTIC, TSSOP-20
文件頁數(shù): 38/44頁
文件大?。?/td> 3181K
代理商: LMX2377UTMX
2.0 Programming Description
(Continued)
2.5.3 PRE Aux
The Aux synthesizer utilizes a selectable dual modulus prescaler.
AUXILIARY SYNTHESIZER PRESCALER SELECT
Aux N[20]
Control Bit
Register Location
Description
Function
0
1
PRE Aux
Aux N[20]
Aux Prescaler Select
8/9 Prescaler
Selected
16/17 Prescaler
Selected
2.5.4 PWDN Aux
The PWDN Aux bit is used to switch the Aux PLL between a powered up and powered down mode.
Furthermore, the PWDN Aux bit operates in conjuction with the TRI-STATE ID
o
Aux bit to set a synchronous or an asynchronous
powerdown mode.
AUXILIARY SYNTHESIZER POWERDOWN
Aux N[21]
Control Bit
Register Location
Description
Function
0
1
PWDN Aux
Aux N[21]
Aux Powerdown
Aux PLL Active
Aux PLL Powerdown
2.6 MAIN R REGISTER
The Main R register contains the Main R_CNTR, PD_POL Main, ID
Main, and TRI-STATE ID
Main control words, in addition
to two bits that compose the F
LD control word. The detailed description and programming information for each control word is
discussed in the following sections.
Reg. Most Significant Bit
21
20
SHIFT REGISTER BIT LOCATION
13
12
11
10
Least Significant Bit
3
2
19
18
17
16
15
14
9
8
7
6
5
4
1
0
Data Field
Address
Field
Main
R
F
o
LD1 F
o
LD3
TRI-
STATE
ID
o
Main
ID
o
Main
PD_
POL
Main
Main R_CNTR[14:0]
1
0
2.6.1 Main R_CNTR[14:0]
Main R[2:16]
The Main reference divider (Main R_CNTR) can be programmed to support divide ratios from 2 to 32767. Divide ratios less than
2 are prohibited.
MAIN SYNTHESIZER PROGRAMMABLE REFERENCE DIVIDER (R COUNTER)
Divide Ratio
Main R_CNTR[14:0]
8
7
0
0
0
0
1
1
14
0
0
1
13
0
0
1
12
0
0
1
11
0
0
1
10
0
0
1
9
0
0
1
6
0
0
1
5
0
0
1
4
0
0
1
3
0
0
1
2
0
0
1
1
1
1
1
0
0
1
1
2
3
32767
L
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