參數(shù)資料
型號(hào): LMX2377USLBX
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類(lèi): XO, clock
英文描述: PLLatinum⑩ Ultra Low Power Dual Frequency Synthesizer for RF Personal Communications
中文描述: PLL FREQUENCY SYNTHESIZER, 2500 MHz, PQCC24
封裝: PLASTIC, CSP-24
文件頁(yè)數(shù): 39/44頁(yè)
文件大?。?/td> 3181K
代理商: LMX2377USLBX
2.0 Programming Description
(Continued)
2.6.2 PD_POL Main
The PD_POL Main bit is used to control the Main synthesizer’s phase detector polarity based on the VCO tuning characteristics.
MAIN SYNTHESIZER PHASE DETECTOR POLARITY
Main R[17]
Control Bit
Register Location
Description
Function
0
1
PD_POL Main
Main R[17]
Main Phase Detector
Polarity
Main VCO Negative
Tuning
Characteristics
Main VCO Positive
Tuning
Characteristics
Main VCO Characteristics
20022682
2.6.3 ID
o
Main
The ID
o
Main bit controls the Main synthesizer’s charge pump gain. Two current levels are available.
MAIN SYNTHESIZER CHARGE PUMP CURRENT GAIN
Main R[18]
Control Bit
Register Location
Description
Function
0
1
ID
o
Main
Main R[18]
Main Charge Pump
Current Gain
LOW
0.95 mA
HIGH
3.80 mA
2.6.4 TRI-STATE ID
o
Main
The TRI-STATE ID
o
Main bit allows the charge pump to be switched between a normal operating mode and a high impedance
output state. This happens asynchronously with the change in the TRI-STATE ID
o
Main bit.
Furthermore, the TRI-STATE ID
o
Main bit operates in conjuction with the PWDN Main bit to set a synchronous or an
asynchronous powerdown mode.
MAIN SYNTHESIZER CHARGE PUMP TRI-STATE CURRENT
Main R[19]
Control Bit
Register Location
Description
Function
0
1
TRI-STATE ID
o
Main
Main R[19]
Main Charge Pump
TRI-STATE Current
Main Charge Pump
Normal Operation
Main Charge Pump
Output in High
Impedance State
L
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相關(guān)PDF資料
PDF描述
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