參數(shù)資料
型號(hào)： LMX2355SLBX
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： PLL合成/DDS/VCOs
英文描述： PLL FREQUENCY SYNTHESIZER, 2500 MHz, QCC24
封裝： PLASTIC, CSP-24
文件頁(yè)數(shù)： 11/23頁(yè)
文件大?。?/td> 403K
代理商： LMX2355SLBX
Programming Description (Continued)
5.3 QUADRATURE MODULUS PRESCALER
The LMX2354 contains a quadrature modulus prescaler, consisting of a prescaler, A counter, B counter and C counter. Once the
N value is known, the A, B, and C values can be calculated by:
C = N div P
B=(N–C
P) div 4
A = N mod 4
For the divide ratio to be legal, it is also required:
C> =max {A, B} + 2
fvco = [N + F] x [fosc/R]
N=P
C+4B+ A
F:
Fractional ratio (contents of FRAC_CNTR divided by the fractional modulus)
f
vco: Output frequency of external voltage controlled oscillator (VCO)
C:
Preset value of the C counter
B:
Preset value of the B counter
A:
Preset value of the A counter
f
osc: Output frequency of the external reference frequency oscillator
R:
Preset divide ratio of binary 15-bit programmable reference counter (3 to 32,767)
P:
Preset modulus of quadrature modulus prescaler
8/9/12/13
550 MHz–1.2 GHz
16/17/20/21
1.2 GHz–2.5 GHz
5.4 SERIAL DATA INPUT TIMING
20004803
Note: Data shifted into register on clock rising edge. Data is shifted in MSB first.
TEST CONDITIONS: The Serial Data Input Timing is tested using a symmetrical waveform around VCC/2. The test waveform has an edge rate of 0.6 V/ns
with amplitudes of 2.2V @ VCC=2.7V and 2.6V @ VCC = 5.5V.
LMX2354
www.national.com
19
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
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