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參數(shù)資料
| 型號： | LMX2301MDC |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 160 MHz, UUC |
| 封裝： | DIE |
| 文件頁數(shù)： | 3/17頁 |
| 文件大小： | 233K |
| 代理商： | LMX2301MDC |
Application Information
LOOP FILTER DESIGN
A block diagram of the basic phase locked loop is shown
TLW12458 – 24
FIGURE 1 Basic Charge Pump Phase Locked Loop
An example of a passive loop filter configuration including
the transfer function of the loop filter is shown in
Figure 2
TLW12458 – 25
Z(s) e
s (C2
# R2) a 1
s2 (C1
# C2 # R2) a sC1 a sC2
FIGURE 2 2nd Order Passive Filter
Define the time constants which determine the pole and
zero frequencies of the filter transfer function by letting
T2 e R2
# C2
(1a)
and
T1 e R2
#
C1
# C2
C1 a C2
(1b)
The PLL linear model control circuit is shown along with the
open loop transfer function in
Figure 3 Using the phase
detector and VCO gain constants Kw and KVCO and the
loop filter transfer function Z(s)
the open loop Bode plot
can be calculated The loop bandwidth is shown on the
Bode plot (0p) as the point of unity gain The phase margin
is shown to be the difference between the phase at the unity
gain point and b180
TLW12458 – 27
Open Loop Gain e ii ie e H(s) G(s)
e
Kw Z(s) KVCO Ns
Closed Loop Gain e io ii e G(s) 1 a H(s) G(s)
TLW12458 – 26
FIGURE 3 Open Loop Transfer Function
Thus we can calculate the 3rd order PLL Open Loop Gain in
terms of frequency
G(s)
# H(s)
ls e j # 0 e
b
Kw
# KVCO (1 a j0 # T2)
02C1
# N(1 a j0 # T1)
#
T1
T2
(2)
From equation 2 we can see that the phase term will be
dependent on the single pole and zero such that
w
(0) e tanb1 (0
# T2) b tanb1 (0 # T1) a 180
(3)
By setting
dw
d0
e
T2
1 a (0
# T2)2
b
T1
1 a (0
# T1)2
e
0
(4)
we find the frequency point corresponding to the phase in-
flection point in terms of the filter time constants T1 and T2
This relationship is given in equation 5
0p e 1
0T2 # T1
(5)
For the loop to be stable the unity gain point must occur
before the phase reaches b180 degrees We therefore
want the phase margin to be at a maximum when the magni-
tude of the open loop gain equals 1 Equation 2 then gives
C1 e
Kw
# KVCO # T1
0p2 # N # T2
(1 a j0p # T2)
(1 a j0p # T1)
(6)
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相關代理商/技術參數(shù) |
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|---|---|
| LMX2301TM | 制造商:Texas Instruments 功能描述: |
| LMX2301TMX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinumTM 160 MHz Frequency Synthesizer for RF Personal Communications |
| LMX2305 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PLLatinumTM 550 MHz Frequency Synthesizer for RF Personal Communications |
| LMX2305 WAF | 制造商:Texas Instruments 功能描述: |
| LMX2305C WAF | 制造商:Texas Instruments 功能描述: |
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