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參數(shù)資料
| 型號(hào)： | LMX2301MDC |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 160 MHz, UUC |
| 封裝： | DIE |
| 文件頁(yè)數(shù)： | 16/17頁(yè) |
| 文件大?。?/td> | 233K |
| 代理商： | LMX2301MDC |
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Functional Description (Continued)
SERIAL DATA INPUT TIMING
TLW12458 – 16
Notes
Parenthesis data indicates programmable reference divider data
Data shifted into register on clock rising edge
Data is shifted in MSB first
Test Conditions
The Serial Data Input Timing is tested using a symmetrical waveform around VCC 2 The test waveform has an edge rate of 06 Vns with
amplitudes of 22V
VCC e 27V and 26V
VCC e 55V
Phase Characteristics
In normal operation the FC pin is used to reverse the polari-
ty of the phase detector Both the internal and any external
charge pump are affected
Depending upon VCO characteristics FC pin should be set
accordingly
When VCO characteristics are like (1) FC should be set
HIGH or OPEN CIRCUIT
When VCO characteristics are like (2) FC should be set
LOW
When FC is set HIGH or OPEN CIRCUIT the monitor pin of
the phase comparator input fout is set to the reference
divider output fr When FC is set LOW fout is set to the
programmable divider output fp
VCO Characteristics
TLW12458 – 17
PHASE COMPARATOR AND INTERNAL CHARGE PUMP CHARACTERISTICS
TLW12458 – 18
Notes
Phase difference detection range b2q to a2q
The minimum width pump up and pump down current pulses occur at the Do pin when the loop is locked
FC e HIGH
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| LMX2301TM | 制造商:Texas Instruments 功能描述: |
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