- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄8929 > LMK04000BISQ/NOPB (National Semiconductor)IC CLOCK CONDITIONER W/PLL 48LLP PDF資料下載
參數(shù)資料
| 型號： | LMK04000BISQ/NOPB |
| 廠商： | National Semiconductor |
| 文件頁數(shù)： | 41/65頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC CLOCK CONDITIONER W/PLL 48LLP |
| 標(biāo)準(zhǔn)包裝： | 1,000 |
| 系列： | PowerWise® |
| 類型： | 時(shí)鐘調(diào)節(jié)器 |
| PLL： | 是 |
| 輸入： | LVCMOS，晶體 |
| 輸出： | LVCMOS，2VPECL，LVPECL |
| 電路數(shù)： | 1 |
| 比率 - 輸入:輸出： | 3:7 |
| 差分 - 輸入:輸出： | 是/是 |
| 頻率 - 最大： | 1.296GHz |
| 除法器/乘法器： | 是/是 |
| 電源電壓： | 3.15 V ~ 3.45 V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 48-WFQFN 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 48-LLP（7x7） |
| 包裝： | 帶卷 (TR) |
| 其它名稱： | LMK04000BISQ |
第1頁第2頁第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁當(dāng)前第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁第54頁第55頁第56頁第57頁第58頁第59頁第60頁第61頁第62頁第63頁第64頁第65頁
SNOSAZ8J – SEPTEMBER 2008 – REVISED SEPTEMBER 2011
Table 33. Typical Current Consumption for Selected Functional Blocks (continued)
Power
Typical ICC
Power
Dissipated in
(Temp = 25 °C,
Dissipated in
LVPECL/2VPECL
Block
Condition
VCC = 3.3 V)
device
Emitter
(mA)
(mW)
Resistors
(mW)
LVPECL/2VPECL buffer (enabled and with 120
Ω emitter
40
82
50
resistors)
LVPECL/2VPECL
LVPECL/2VPECL buffer (disabled and with 120
Ω emitter
Buffer
21.7
47
25
resistors)
LVPECL/2VPECL (disabled and with no emitter resistors)
0
-
LVCMOS buffer static ICC, CL = 5 pF
4.5
15
-
LVCMOS Buffer
LVCMOS buffer dynamic ICC, CL = 5 pF, CLKout = 100
(1)
16
53
-
MHz
Entire device
LMK0400x (2) (3)
379.5
1102
150
(Single input clock
LMK0401x (2) (3)
377.5
996
250
(CLKIN_SEL = 0
LMK0403x (2) (3)
or 1); LOS
disabled; PLL1
and PLL2 locked;
Fout disabled; All
337.1
1012
100
CLKouts are on;
No delay); Divide
> 2 on each
output.
(1)
Dynamic power dissipation of LVCMOS buffer varies with output frequency and can be found in the LVCMOS dynamic ICC vs frequency
plot, as shown in Typical Performance Characteristics. Total power dissipation of the LVCMOS buffer is the sum of static and dynamic
power dissipation. CLKoutXa and CLKoutXb are each considered an LVCMOS buffer.
(2)
Assuming ThetaJ = 27.4 °C/W, the total power dissipated on chip must be less than 40/27.4 = 1450 mW to guarantee a junction
temperature is less than 125 °C.
(3)
Worst case power dissipation can be estimated by multiplying typical power dissipation with a factor of 1.2.
Current Consumption / Power Dissipation Calculations
Due to the myriad of possible configurations the following table serves to provide enough information to allow the
user to calculate estimated current consumption of the device. Unless otherwise noted VCC = 3.3 V, TA = 25 °C.
From Table 33 the current consumption can be calculated in any configuration. For example, the current for the
entire device with 1 LVDS (CLKout0) & 1 LVPECL (CLKout1) output in bypassed mode can be calculated by
adding up the following blocks: core current, clock buffer, one LVDS output buffer current, and one LVPECL
output buffer current. There will also be one LVPECL output drawing emitter current, but some of the power from
the current draw is dissipated in the external 120
Ω resistors which doesn't add to the power dissipation budget
for the device. If delays or divides are switched in, then the additional current for these stages needs to be added
as well.
For power dissipated by the device, the total current entering the device is multiplied by the voltage at the device
minus the power dissipated in any emitter resistors connected to any of the LVPECL outputs. If no emitter
resistors are connected to the LVPECL outputs, this power will be 0 watts. For example, in the case of 1 LVDS
(CLKout0) & 1 LVPECL (CLKout1) operating at 3.3 V, we calculate 3.3 V × (115 + 10 + 10 + 19.3 + 40) mA = 3.3
V × 194.3 mA = 641.2 mW. Because the LVPECL output (CLKout1) has the emitter resistors hooked up and the
power dissipated by these resistors is 50 mW, the total device power dissipation is 641.2 mW - 50 mW = 591.2
mW.
When the LVPECL output is active, ~1.7 V is the average voltage on each output as calculated from the LVPECL
VOH & VOL typical specification. Therefore the power dissipated in each emitter resistor is approximately (1.7 V)
2 /
120
Ω = 25 mW. When the LVPECL output is disabled, the emitter resistor voltage is ~1.07 V. Therefore the
power dissipated in each emitter resistor is approximately (1.07 V)2 / 120
Ω = 9.5 mW.
46
Copyright 2008–2011, Texas Instruments Incorporated
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| VI-JVT-MZ-F2 | CONVERTER MOD DC/DC 6.5V 25W |
| LMK04033BISQ/NOPB | IC CLOCK CONDITIONER PREC 48LLP |
| VI-JVN-MZ-F2 | CONVERTER MOD DC/DC 18.5V 25W |
| LMK04031BISQ/NOPB | IC CLOCK CONDITIONER W/PLL 48LLP |
| VI-JVM-MZ-F1 | CONVERTER MOD DC/DC 10V 25W |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LMK04000BISQX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs |
| LMK04000BISQX/NOPB | 功能描述:時(shí)鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| LMK04001BISQ | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs |
| LMK04001BISQ/NOPB | 功能描述:時(shí)鐘合成器/抖動清除器 RoHS:否 制造商:Skyworks Solutions, Inc. 輸出端數(shù)量: 輸出電平: 最大輸出頻率: 輸入電平: 最大輸入頻率:6.1 GHz 電源電壓-最大:3.3 V 電源電壓-最小:2.7 V 封裝 / 箱體:TSSOP-28 封裝:Reel |
| LMK04001BISQE | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low-Noise Clock Jitter Cleaner with Cascaded PLLs |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。