參數(shù)資料
型號(hào): LM98725
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PDSO56
封裝: TSSOP-56
文件頁數(shù): 11/14頁
文件大?。?/td> 464K
代理商: LM98725
Pin
Name
I/O
Typ
Res
Description
37
DOUT4/
O
D
Bit 4 of the digital video output bus in CMOS Mode, LVDS Data Out2- in LVDS Mode.
TXOUT2-
38
DOUT3/
O
D
Bit 3 of the digital video output bus in CMOS Mode, LVDS Data Out1+ in LVDS Mode.
TXOUT1+
39
DOUT2/
O
D
Bit 2 of the digital video output bus in CMOS Mode, LVDS Data Out1- in LVDS Mode.
TXOUT1-
40
DOUT1/
O
D
Bit 1 of the digital video output bus in CMOS Mode, LVDS Data Out0+ in LVDS Mode.
TXOUT0+
41
DOUT0/
O
D
Bit 0 of the digital video output bus in CMOS Mode, LVDS Data Out0- in LVDS Mode.
TXOUT0-
42
DGND
O
D
PD
Configurable sensor control output.
43
V
D
P
Power supply for the digital circuits. Bypass this supply pin with 0.1
μF capacitor. A single
4.7
μF capacitor should be used between the supply and the VD, VR and VC pins.
44
V
C
P
Power supply for the sensor control outputs. Bypass this supply pin with 0.1
μF capacitor.
45
CLKOUT/SH2
O
D
Output clock for registering output data when using CMOS outputs, or a configurable
low speed sensor timing output.
46
SH3
O
D
Configurable low speed sensor timing output.
47
RS
O
D
Configurable high speed sensor timing output.
48
CP
O
D
Configurable high speed sensor timing output.
49
PHIA1
O
D
Configurable high speed sensor timing output.
50
PHIA2
O
D
Configurable high speed sensor timing output.
51
DGND
P
Digital ground return.
52
V
C
P
Power supply for the sensor control outputs.
Bypass this supply pin with 0.1
μF capacitor.
53
PHIB1
O
D
Configurable high speed sensor timing output.
54
PHIB2
O
D
Configurable high speed sensor timing output.
55
SH4
O
D
Configurable low speed sensor timing output.
56
SH5
O
D
Configurable low speed sensor timing output.
(I=Input), (O=Output), (IO=Bi-directional), (P=Power), (D=Digital), (A=Analog), (PU=Pull Up with an internal resistor), (PD=Pull Down with an internal resistor.).
www.national.com
6
LM98725
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