參數(shù)資料
型號(hào)： LM9801CCV
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 模擬信號(hào)調(diào)理
英文描述： Greyscale/24-Bit Color Linear CCD Sensor Processor
中文描述： SPECIALTY ANALOG CIRCUIT, PQCC52
封裝： PLASTIC, LCC-52
文件頁(yè)數(shù)： 24/34頁(yè)
文件大?。?/td> 520K
代理商： LM9801CCV
Applications Information
(Continued)
4.9 ADC
The ADC converts the normalized analog output signal to
an 8-bit digital code. The EOC output goes from high to low
to indicate that a new conversion is ready. ADC data can be
latched by external memory on the rising edge of EOC. The
RD input takes the ADC’s output buffer in and out of
TRI-STATE. RD may be tied to EOC in many applications,
putting the data on the bus only when EOC is low, and al-
lowing other data on the bus (such as CD0–CD7 correction
data) at other times. In this way the output data and correc-
tion coefficient data can share the same databus (see Dia-
gram 12).
5.0 CALIBRATION
Calibration of a CCD scanner is done to normalize the pixels
of a linear CCD so that each pixel produces the same digital
output code at the output of the scanner when presented
with the same image light intensity. This intensity ranges
from black (no light) to white (maximum light intensity). The
CCD’s analog output may have large pixel-to-pixel DC off-
sets (corresponding to errors on black signals) and pixel-to-
pixel variations in their output voltage given the same white
image (corresponding to errors on brighter signals). If these
offsets are subtracted from each pixel, and each pixel is
given its own gain setting to correct for different efficiencies,
then these errors can be eliminated.
Ideally the digital output code for any pixel would be zero for
a black image, and some code near fullscale for an image
with maximum brightness. For an 8-bit system like the
LM9801, that code might be 250. This code will be called
the Target Code.
The LM9801 eliminates these global and pixel-to-pixel off-
set and gain errors with its Correlated Double Sampling
(CDS), Offset DACs, Variable Gain Amplifier, and pixel-rate
Programmable Gain Amplifier. This section describes how
to program the LM9801 and the coefficient RAM being used
with it to eliminate these errors.
Calibration of a LM9801-based system requires 3 steps.
The first, described in Section 5.1, Offset Calibration, takes
a black image and normalizes the digital output code for
each pixel to a code at or near 0.
The second step, Section 5.2, Coarse Gain (VGA) Calibra-
tion, finds the optimum gain setting that places the output
voltage of all the pixels within the 9 dB adjustment range of
the PGA.
The final step, described in Section 5.3, PGA Correction
Coefficients (Shading Calibration), describes how to calcu-
late the gain required to normalize the output of each pixel
to the desired output code (the Target code).
5.1 Offset Calibration
This procedure corrects for static offsets generated by the
CCD and the LM9801. Because the LM9801 uses CDS to
eliminate the pixel-to-pixel offset errors of the CCD, no pix-
el-rate offset correction is required.
To use the Offset DAC and Offset Add bit for offset correc-
tion, the offset errors (V
OS1
and V
OS2
) must first be deter-
mined, as shown inFigure 6. This is done be measuring the
voltage at the PGA output, using the ADC with a black im-
age on the CCD (a black image can usually be created sim-
TL/H/12814–33
FIGURE 6. Offset Calibration
ply by turning off the scanner’s illumination). If this voltage is
known with a PGA gain of 1.00V/V (0 dB) and 2.95V/V
(9 dB), then the offset errors (V
OS1
and V
OS2
) can be deter-
mined from the following two equations:
V
ADC1
e
1(V
OS1
a
V
DAC1
)
a
V
OS2
a
V
DAC2
(PGA gain
e
1)
V
ADC2
e
2.95(V
OS1
a
V
DAC1
)
a
V
OS2
a
V
DAC2
(PGA gain
e
2.95)
Solving for V
OS1
and V
OS2
:
V
OS1
e
(V
ADC2
–V
ADC1
)/1.95–V
DAC1
V
OS2
e
(2.95V
ADC1
–V
ADC2
)/1.95–V
DAC2
These equations were used to produce this procedure for
cancelling the LM9801’s offset errors. Please note that all
voltages and measurements are in units of ADC LSBs to
simplify calibration.
1. Set the VGA Gain to 1V/V (VGA code
e
0 LSBs).
2. Set the Offset DAC (V
DAC1
) to its maximum value
(
a
6.3 LSBs) to ensure the total offset is positive and
therefore measurable by the ADC.
3. Set the Offset Add bit (V
DAC2
) to 0.
4. Set the PGA Gain to 1V/V (PGA code
e
0).
5. Digitize a black line.
6. Calculate the average (in ADC LSBs) of all the valid
pixels in the black line and store that number as V
ADC1
.
7. Set the PGA Gain to 2.95V/V (PGA code
e
255).
8. Digitize a black line.
9. Calculate the average (in ADC LSBs) of all the valid
pixels in the black line and store that number as V
ADC2
.
10. Calculate V
OS1
:
V
OS1
e
(V
ADC2
–V
ADC1
)/1.95–6.3
11. Program the Offset DAC register using the formula:
Offset DAC code
e
-(V
OS1
)(15/6.3)
e
(6.3
a
(V
ADC1
–V
ADC2
)/1.95)(15/6.3)
e
15
a
1.22(V
ADC1
–V
ADC2
)
(
Note:
This calculation can be done as
15
a
39(V
ADC1
–V
ADC2
)/32
for ease of programming in 8-bit microcontrollers)
12. If 3V
ADC1
l
V
ADC2
, then set the Offset Add bit to 0.
If 3V
ADC1
k
V
ADC2
, set the Offset Add bit to 1.
13. The final value of the offset present at the ADC input
can be used for the shading calibration calculations.
Calculate the final value of the ADC input offset
(V
OFFSET
) using:
V
OFFSET
e
(3V
ADC1
–V
ADC2
)/2
(if the Offset Add bit is 0), or
V
OFFSET
e
(3V
ADC1
–V
ADC2
)/2
a
2
(if the Offset Add bit is 1)
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