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參數(shù)資料
| 型號(hào)： | LM73 |
| 廠商： | National Semiconductor Corporation |
| 元件分類： | 溫度/濕度傳感器 |
| 英文描述： | 2.7V, SOT-23, 11-to-14 Bit Digital Temperature Sensor with 2-Wire Interface |
| 中文描述： | 為2.7V，采用SOT - 23，11至14位數(shù)字溫度傳感器，2線接口 |
| 文件頁數(shù)： | 6/18頁 |
| 文件大?。?/td> | 732K |
| 代理商： | LM73 |
SMBus Communication
20147809
Note 2:
Absolute Maximum Ratings indicate limits beyond which damage to the device may occur. DC and AC electrical specifications do not apply when operating
the device beyond its rated operating conditions.
Note 3:
When the input voltage (V
I
) at any pin exceeds the power supplies (V
I
<
GND or V
I
>
V
DD
), the current at that pin should be limited to 5 mA.
Note 4:
Reflow temperature profiles are different for lead-free and non-lead-free packages.
Note 5:
Human body model, 100 pF discharged through a 1.5 k
resistor. Machine model, 200 pF discharged directly into each pin.
Note 6:
Typicals are at T
A
= 25C and represent most likely parametric norm.
Note 7:
Limits are guaranteed to National’s AOQL (Average Outgoing Quality Level).
Note 8:
Local temperature accuracy does not include the effects of self-heating. The rise in temperature due to self-heating is the product of the internal power
dissipation of the LM73 and the thermal resistance.
Note 9:
This specification is provided only to indicate how often temperature data is updated. The LM73 can be read at any time without regard to conversion state
(and will yield last conversion result).
Note 10:
The output fall time is measured from (V
IL;MAX
- 0.15V) to (V
IH;MIN
+ 0.15V).
Note 11:
Holding the SMBDAT and/or SMBCLK lines Low for a time interval greater than t
TIMEOUT
will reset the LM73’s SMBus state machine, setting SMBDAT
and SMBCLK pins to a high impedance state.
Note 12:
Represents the time from V
reaching the power-on-reset level to the LM73 communications being functional. After an additional time equal to one
temperature conversion time, valid temperature will be available in the Temperature Register.
Note 13:
A write to an invalid pointer address is not allowed. If the master writes an invalid address to the Pointer Register, (1) the LM73 will not acknowledge the
address and (2) the Pointer Register will continue to contain the last value stored in it.
L
www.national.com
6
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