
1.0 Functional Description
(Continued)
1.10 FAULT QUEUE
The LM64 incorporates a Fault Queue to suppress errone-
ous ALERT triggering . The Fault Queue prevents false
triggering by requiring three consecutive out-of-limit HIGH,
LOW, or T_CRIT temperature readings. See Figure 10. The
Fault Queue defaults to OFF upon power-up and may be
activated by setting the RDTS Fault Queue bit in the Con-
figuration Register to a 1.
1.11 ONE-SHOT REGISTER
The One-Shot Register is used to initiate a single conversion
and comparison cycle when the device is in standby mode,
after which the data returns to standby. This is not a data
register. A write operation causes the one-shot conversion.
The data written to this address is irrelevant and is not
stored. A zero will always be read from this register.
1.12 SERIAL INTERFACE RESET
In the event that the SMBus Master is reset while the LM64
is transmitting on the SMBDAT line, the LM64 must be
returned to a known state in the communication protocol.
This may be done in one of two ways:
1.
When SMBDAT is Low, the LM64 SMBus state machine
resets to the SMBus idle state if either SMBData or
SMBCLK are held Low for more than 35 ms (t
TIMEOUT
).
All devices are to timeout when either the SMBCLK or
SMBDAT lines are held Low for 25 ms – 35 ms. There-
fore, to insure a timeout of all devices on the bus, either
the SMBCLK or the SMBData line must be held Low for
at least 35 ms.
2.
With both SMBDAT and SMBCLK High, the master can
initiate an SMBus start condition with a High to Low
transition on the SMBDAT line. The LM64 will respond
properly to an SMBus start condition at any point during
the communication. After the start the LM64 will expect
an SMBus Address address byte.
20065513
FIGURE 10. Fault Queue Temperature Response
Diagram
L
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