參數(shù)資料
型號: LM5111-2M
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 外設(shè)及接口
英文描述: Dual 5A Compound Gate Driver
中文描述: 5 A BUF OR INV BASED PRPHL DRVR, PDSO8
封裝: MS-012AA, SOIC-8
文件頁數(shù): 8/10頁
文件大?。?/td> 205K
代理商: LM5111-2M
Layout Considerations
Attention must be given to board layout when using LM5111.
Some important considerations include:
1.
A Low ESR/ESL capacitor must be connected close to
the IC and between the V
and V
EE
pins to support
high peak currents being drawn from V
CC
during turn-on
of the MOSFET.
2.
Proper grounding is crucial. The drivers need a very low
impedance path for current return to ground avoiding
inductive loops. The two paths for returning current to
ground are a) between LM5111 V
EE
pin and the ground
of the circuit that controls the driver inputs, b) between
LM5111 V
EE
pin and the source of the power MOSFET
being driven. All these paths should be as short as
possible to reduce inductance and be as wide as pos-
sible to reduce resistance.All these ground paths should
be kept distinctly separate to avoid coupling between the
high current output paths and the logic signals that drive
the LM5111. A good method is to dedicate one copper
plane in a multi-layered PCB to provide a common
ground surface.
3.
With the rise and fall times in the range of 10 ns to 30 ns,
care is required to minimize the lengths of current car-
rying conductors to reduce their inductance and EMI
from the high di/dt transients generated by the LM5111.
4.
The LM5111 SOIC footprint is compatible with other
industry standard drivers including the TC4426/27/28
and UCC27323/4/5.
5.
If either channel is not being used, the respective input
pin (IN_A or IN_B) should be connected to either V
EE
or
V
CC
to avoid spurious output signals.
Thermal Performance
INTRODUCTION
The primary goal of thermal management is to maintain the
integrated circuit (IC) junction temperature (T
J
) below a
specified maximum operating temperature to ensure reliabil-
ity. It is essential to estimate the maximum T
J
of IC compo-
nents in worst case operating conditions. The junction tem-
perature is estimated based on the power dissipated in the
IC and the junction to ambient thermal resistance
θ
for the
IC package in the application board and environment. The
θ
is not a given constant for the package and depends on
the printed circuit board design and the operating environ-
ment.
DRIVE POWER REQUIREMENT CALCULATIONS IN
LM5111
The LM5111 dual low side MOSFET driver is capable of
sourcing/sinking 3A/5A peak currents for short intervals to
drive a MOSFET without exceeding package power dissipa-
tion limits. High peak currents are required to switch the
MOSFET gate very quickly for operation at high frequencies.
The schematic above shows a conceptual diagram of the
LM5111 output and MOSFET load. Q1 and Q2 are the
switches within the gate driver. R
is the gate resistance of
the external MOSFET, and C
is the equivalent gate capaci-
tance of the MOSFET. The gate resistance Rg is usually very
small and losses in it can be neglected. The equivalent gate
capacitance is a difficult parameter to measure since it is the
combination of C
(gate to source capacitance) and C
(gate to drain capacitance). Both of these MOSFET capaci-
tances are not constants and vary with the gate and drain
voltage. The better way of quantifying gate capacitance is
the total gate charge Q
G
in coloumbs. Q
combines the
charge required by C
GS
and C
GD
for a given gate drive
voltage V
GATE
.
Assuming negligible gate resistance, the total power dissi-
pated in the MOSFET driver due to gate charge is approxi-
mated by
P
DRIVER
= V
GATE
x Q
G
x F
SW
Where
F
SW
= switching frequency of the MOSFET.
For example, consider the MOSFET MTD6N15 whose gate
charge specified as 30 nC for V
GATE
= 12V.
The power dissipation in the driver due to charging and
discharging of MOSFET gate capacitances at switching fre-
quency of 300 kHz and V
GATE
of 12V is equal to
P
DRIVER
= 12V x 30 nC x 300 kHz = 0.108W.
If both channels of the LM5111 are operating at equal fre-
quency with equivalent loads, the total losses will be twice as
this value which is 0.216W.
In addition to the above gate charge power dissipation, -
transient power is dissipated in the driver during output
transitions. When either output of the LM5111 changes state,
current will flow from V
to V
for a very brief interval of
time through the output totem-pole N and P channel
MOSFETs. The final component of power dissipation in the
driver is the power associated with the quiescent bias cur-
rent consumed by the driver input stage and Under-voltage
lockout sections.
Characterization of the LM5111 provides accurate estimates
of the transient and quiescent power dissipation compo-
nents. At 300 kHz switching frequency and 30 nC load used
in the example, the transient power will be 8 mW. The 1 mA
nominal quiescent current and 12V V
GATE
supply produce a
12 mW typical quiescent power.
Therefore the total power dissipation
P
D
= 0.216 + 0.008 + 0.012 = 0.236W.
20112307
FIGURE 2.
L
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