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| 型號： | LM5035AMH-1 |
| 廠商： | NATIONAL SEMICONDUCTOR CORP |
| 元件分類： | 穩(wěn)壓器 |
| 英文描述： | SWITCHING CONTROLLER, 2000 kHz SWITCHING FREQ-MAX, PDSO28 |
| 封裝： | TSSOP-28 |
| 文件頁數(shù)： | 9/30頁 |
| 文件大?。?/td> | 585K |
| 代理商： | LM5035AMH-1 |
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sistor (R
FF) connected to VIN while the threshold of the clamp
is a fixed voltage (2.5V). An example will illustrate the use of
the Volt Second Clamp comparator to achieve a 50% duty
cycle limit at 200kHz with a 48V line input. A 50% duty cycle
at a 200kHz requires a 2.5s on-time. To achieve this maxi-
mum on-time clamp level:
The recommended capacitor value range for C
FF is 100 pF to
1000 pF. 470 pF is a standard value that can be paired with
an 110 k
to approximate the desired 51.4s time constant.
If load transient response is slowed by the 10% margin, the
R
FF value can be increased. The system signal-to-noise will
be slightly decreased by increasing R
FF x CFF.
Oscillator, Sync Capability
The LM5035A oscillator frequency is set by a single external
resistor connected between the RT and AGND pins. To set a
desired oscillator frequency, the necessary RT resistor is cal-
culated from:
For example, if the desired oscillator frequency is 400kHz (HO
and LO each switching at 200 kHz) a 15 k
resistor would be
the nearest standard one percent value.
Each output (HO, LO, SR1 and SR2) switches at half the os-
cillator frequency. The voltage at the RT pin is internally
regulated to a nominal 2V. The RT resistor should be located
as close as possible to the IC, and connected directly to the
pins (RT and AGND). The tolerance of the external resistor,
and the frequency tolerance indicated in the Electrical Char-
acteristics, must be taken into account when determining the
worst case frequency range.
The LM5035A can be synchronized to an external clock by
applying a narrow pulse to the RT pin. The external clock must
be at least 10% higher than the free-running oscillator fre-
quency set by the RT resistor. If the external clock frequency
is less than the RT resistor programmed frequency, the
LM5035A will ignore the synchronizing pulses. The synchro-
nization pulse width at the RT pin must be a minimum of 15
ns wide. The clock signal should be coupled into the RT pin
through a 100 pF capacitor or a value small enough to ensure
the pulse width at RT is less than 60% of the clock period
under all conditions. When the synchronizing pulse transi-
tions low-to-high (rising edge), the voltage at the RT pin must
be driven to exceed 3.2V volts from its nominal 2 VDC level.
During the clock signal’s low time, the voltage at the RT pin
will be clamped at 2 VDC by an internal regulator. The output
impedance of the RT regulator is approximately 100
. The
RT resistor is always required, whether the oscillator is free
running or externally synchronized.
Gate Driver Outputs (HO & LO)
The LM5035A provides two alternating gate driver outputs,
the floating high side gate driver HO and the ground refer-
enced low side driver LO. Each driver is capable of sourcing
1.25A and sinking 2A peak. The HO and LO outputs operate
in an alternating manner, at one-half the internal oscillator
frequency. The LO driver is powered directly by the VCC reg-
ulator. The HO gate driver is powered from a bootstrap ca-
pacitor connected between HB and HS. An external diode
connected between VCC (anode pin) and HB (cathode pin)
provides the high side gate driver power by charging the boot-
strap capacitor from VCC when the switch node (HS pin) is
low. When the high side MOSFET is turned on, HB rises to a
peak voltage equal to V
VCC + VHS where VHS is the switch
node voltage.
The HB and VCC capacitors should be placed close to the
pins of the LM5035A to minimize voltage transients due to
parasitic inductances since the peak current sourced to the
MOSFET gates can exceed 1.25A. The recommended value
of the HB capacitor is 0.01 F or greater. A low ESR / ESL
capacitor, such as a surface mount ceramic, should be used
to prevent voltage droop during the HO transitions.
The maximum duty cycle for each output is limited to slightly
less than 50% due to the internally fixed deadtime and any
programmed sync rectifier delay. The typical deadtime in this
condition is 70 ns. The programmed sync rectifier delay is
determined by the DLY pin resistor. If the COMP pin is open
circuit, the outputs will operate at maximum duty cycle. The
maximum duty cycle for each output can be calculated with
the following equation:
Where T
S is the period of one complete cycle for either the
HO or LO outputs, TD is the internally fixed deadtime, and T1
is the programmed sync rectifier delay. For example, if the
oscillator frequency is 200 kHz, each output will cycle at 100
kHz (T
S = 10 s). Using the nominal deadtime of 70 ns and
no programmed delay, the maximum duty cycle at this fre-
quency is calculated to be 49.3%. Using a programmed sync
rectifier delay of 100 ns, the maximum duty cycle is reduced
to 48.3%.
17
www.national.com
LM5035A/LM5035A-1
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參數(shù)描述 |
|---|---|
| LM5035AMH-1/NOPB | 功能描述:電壓模式 PWM 控制器 100V Hb Pwm W/Driver RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| LM5035AMHX | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PWM Controller with Integrated Half-Bridge and SyncFET PWM Controller with Integrated Half-Bridge and SyncFET |
| LM5035AMHX/NOPB | 功能描述:電壓模式 PWM 控制器 RoHS:否 制造商:Texas Instruments 輸出端數(shù)量:1 拓?fù)浣Y(jié)構(gòu):Buck 輸出電壓:34 V 輸出電流: 開關(guān)頻率: 工作電源電壓:4.5 V to 5.5 V 電源電流:600 uA 最大工作溫度:+ 125 C 最小工作溫度:- 40 C 封裝 / 箱體:WSON-8 封裝:Reel |
| LM5035AMHX-1 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:PWM Controller with Integrated Half-Bridge and SyncFET PWM Controller with Integrated Half-Bridge and SyncFET |
| LM5035AMHX-1/NOPB | 功能描述:板上安裝溫度傳感器 RoHS:否 制造商:Omron Electronics 輸出類型:Digital 配置: 準(zhǔn)確性:+/- 1.5 C, +/- 3 C 溫度閾值: 數(shù)字輸出 - 總線接口:2-Wire, I2C, SMBus 電源電壓-最大:5.5 V 電源電壓-最小:4.5 V 最大工作溫度:+ 50 C 最小工作溫度:0 C 關(guān)閉: 安裝風(fēng)格: 封裝 / 箱體: 設(shè)備功能:Temperature and Humidity Sensor |
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