
Applications Information (Continued)
supply this average load current during the maximum on-
time. To keep the input voltage ripple to less than 2V (for this
exercise), C1 calculates to:
Quality ceramic capacitors in this value have a low ESR
which adds only a few millivolts to the ripple. It is the capaci-
tance which is dominant in this case. To allow for the capaci-
tor’s tolerance, temperature effects, and voltage effects, a
1.0 F, 100V, X7R capacitor will be used.
C4: The recommended value is 0.01F for C4, as this is
appropriate in the majority of applications. A high quality
ceramic capacitor, with low ESR is recommended as C4
supplies the surge current to charge the buck switch gate at
turn-on. A low ESR also ensures a quick recharge during
each off-time. At minimum Vin, when the on-time is at maxi-
mum, it is possible during start-up that C4 will not fully
recharge during each 300 ns off-time. The circuit will not be
able to complete the start-up, and achieve output regulation.
This can occur when the frequency is intended to be low
(e.g., R
ON = 500K). In this case C4 should be increased so
it can maintain sufficient voltage across the buck switch
driver during each on-time.
C5: This capacitor helps avoid supply voltage transients and
ringing due to long lead inductance at V
IN. A low ESR, 0.1F
ceramic chip capacitor is recommended, located close to the
LM5008EP.
FINAL CIRCUIT
The final circuit is shown in
Figure 13. The circuit was tested,
and the resulting performance is shown in
Figure 6 through
PC BOARD LAYOUT
The LM5008EP regulation and over-voltage comparators
are very fast, and as such will respond to short duration
noise pulses. Layout considerations are therefore critical for
optimum performance. The components at pins 1, 2, 3, 5,
and 6 should be as physically close as possible to the IC,
thereby minimizing noise pickup in the PC tracks. The cur-
rent loop formed by D1, L1, and C2 should be as small as
possible. The ground connection from C2 to C1 should be as
short and direct as possible.
If the internal dissipation of the LM5008EP produces exces-
sive junction temperatures during normal operation, good
use of the pc board’s ground plane can help considerably to
dissipate heat. The exposed pad on the bottom of the LLP-8
package can be soldered to a ground plane on the PC board,
and that plane should extend out from beneath the IC to help
dissipate the heat. Additionally, the use of wide PC board
traces, where possible, can also help conduct heat away
from the IC. Judicious positioning of the PC board within the
end product, along with use of any available air flow (forced
or natural convection) can help reduce the junction
temperatures.
20187622
FIGURE 13. LM5008EP Example Circuit
LM5008EP
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