參數(shù)資料
型號(hào): LM3743MMX-1000
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 穩(wěn)壓器
英文描述: N-Channel FET Synchronous Buck Controller for Low Output Voltages
中文描述: SWITCHING CONTROLLER, 1150 kHz SWITCHING FREQ-MAX, PDSO10
封裝: PLASTIC, MSOP-10
文件頁(yè)數(shù): 14/23頁(yè)
文件大?。?/td> 1145K
代理商: LM3743MMX-1000
Application Information
(Continued)
The output of the low-side driver swings between V
and
ground, whereas the output of the high-side driver swings
between V
+ V
and V
. To keep the high-side
MOSFET fully on, the Gate pin voltage of the MOSFET must
be higher than its instantaneous Source pin voltage by an
amount equal to the ’Miller plateau’. It can be shown that this
plateau is equal to the threshold voltage of the chosen
MOSFET plus a small amount equal to I
OUT
/g. Here I
OUT
is
the maximum load current of the application, and g is the
transconductance of this MOSFET (typically about 100 for
logic-level devices). That means we must choose V
BOOT_DC
to at least exceed the Miller plateau level. This may therefore
affect the choice of the threshold voltage of the external
MOSFETs, and that in turn may depend on the chosen V
IN
rail.
So far in the discussion above, the forward drop across the
bootstrap diode has been ignored. But since that does affect
the output of the driver, it is a good idea to include this drop
in the following examples. Looking at the Typical Application
schematic, this means that the difference voltage V
- V
,
which is the voltage the bootstrap capacitor charges up to,
must always be greater than the maximum tolerance limit of
the threshold voltage of the upper MOSFET. Here V
is the
forward voltage drop across the bootstrap diode D1. This
voltage drop may place restrictions on the type of MOSFET
selected.
The capacitor C10 serves to maintain enough voltage be-
tween the top MOSFET gate and source to control the
device even when the top MOSFET is on and its source has
risen up to the input voltage level. The charge pump circuitry
is fed from V
, which can operate over a range from 3.0V to
5.5V. Using this basic method the voltage applied to the high
side gate V
IN
- V
D1
. This method works well when V
IN
is
5V
±
10%, because the gate drives will get at least 4.0V of
drive voltage during the worst case of V
IN-MIN
= 4.5V and
V
D1-MAX
= 0.5V. Logic level MOSFETs generally specify their
on-resistance at V
GS
= 4.5V. When V
CC
= 3.3V
±
10%, the
gate drive at worst case could go as low as 2.5V. Logic level
MOSFETs are not guaranteed to turn on, or may have much
higher on-resistance at 2.5V. Sub-logic level MOSFETs, usu-
ally specified at V
= 2.5V, will work, but are more expen-
sive and tend to have higher on-resistance.
LOW-SIDE CURRENT LIMIT
The main current limit of the LM3743 is realized by sensing
the voltage drop across the low-side FET as the load current
passes through it. The R
of the MOSFET is a known
value; hence the voltage across the MOSFET can be deter-
mined as:
V
DS
= I
OUT
x R
DSON
The current flowing through the low-side MOSFET while it is
on is the falling portion of the inductor current. The current
limit threshold is determined by an external resistor, R1,
connected between the switching node and the ILIM pin. A
constant current (I
) of 50 μA typical is forced through R1,
causing a fixed voltage drop. This fixed voltage is compared
against V
DS
and if the latter is higher, the current limit of the
chip has been reached. To obtain a more accurate value for
R1 you must consider the operating values of R
DSON
and
I
ILIM
at their operating temperatures in your application and
the effect of slight parameter variations from part to part. R1
can be found by using the following equation using the
R
value of the low side MOSFET at it’s expected hot
temperature and the absolute minimum value expected over
the full temperature range for the I
ILIM
which is 42.5 μA:
R1 = R
DSON-HOT
x I
CLIM
/ I
ILIM
For example, a conservative 15A current limit (I
) in a
10A design with a R
of 10 m
would require a 3.83
k
resistor. The LM3743 enters current limit mode if the
inductor current exceeds the set current limit threshold. The
inductor current is first sampled 50 ns after the low-side
MOSFET turns on. Note that in normal operation mode the
high-side MOSFET always turns on at the beginning of a
clock cycle. In current limit mode, by contrast, the high-side
MOSFET on-pulse is skipped. This causes inductor current
to fall. Unlike a normal operation switching cycle, however, in
a current limit mode switching cycle the high-side MOSFET
will turn on as soon as inductor current has fallen to the
current limit threshold.
The low-side current sensing scheme can only limit the
current during the converter off-time, when inductor current
is falling. Therefore in a typical current limit plot the valleys
are normally well defined, but the peaks are variable, ac-
cording to the duty cycle, see
Figure 5
. The PWM error
amplifier and comparator control the pulse of the high-side
MOSFET, even during current limit mode, meaning that peak
inductor current can exceed the current limit threshold. For
example, during an output short-circuit to ground, and as-
suming that the output inductor does not saturate, the maxi-
mum peak inductor current during current limit mode can be
calculated with the following equation:
Where T
is the inverse of switching frequency f
. The
200 ns term represents the minimum off-time of the duty
cycle, which ensures enough time for correct operation of
the current sensing circuitry.
In order to minimize the temperature effects of the peak
inductor currents, the IC enters hiccup mode after 15 over
current events, or a long current limit event that lasts 15
switching cycles (the counter is reset when 32 non-current
20177444
FIGURE 5. Current Limit Threshold
L
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14
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