參數(shù)資料
型號: LM3405A
廠商: National Semiconductor Corporation
英文描述: 1.6MHz, 1A Constant Current Buck LED Driver with Internal Compensation in Tiny SOT23 Package
中文描述: 1.6MHz的,第1A恒流降壓型LED在微型SOT23封裝和內(nèi)部補(bǔ)償驅(qū)動(dòng)器
文件頁數(shù): 12/20頁
文件大?。?/td> 396K
代理商: LM3405A
The gate charge loss is associated with the gate charge Q
G
required to drive the switch:
P
G
= f
SW
x V
IN
x Q
G
The power loss required for operation of the internal circuitry:
P
Q
= I
Q
x V
IN
I
is the quiescent operating current, and is typically around
1.8mA for the LM3405A.
The total power loss in the IC is:
P
INTERNAL
= P
COND
+ P
SW
+ P
G
+ P
Q
An example of power losses for a typical application is shown
in
Table 2
:
TABLE 2. Power Loss Tabulation
Conditions
Power loss
V
IN
V
OUT
I
OUT
V
D1
R
DS(ON)
f
SW
T
RISE
T
FALL
I
Q
Q
G
D is calculated to be 0.36
12V
3.9V
1.0A
0.45V
300m
1.6MHz
P
COND
108mW
18ns
P
SW
288mW
12ns
1.8mA
P
Q
P
G
22mW
1.4nC
27mW
Σ (
P
COND
+ P
SW
+ P
Q
+ P
G
) = P
INTERNAL
P
INTERNAL
= 445mW
PCB Layout Considerations
When planning layout there are a few things to consider when
trying to achieve a clean, regulated output. The most impor-
tant consideration when completing the layout is the close
coupling of the GND connections of the input capacitor C1
and the catch diode D1. These ground ends should be close
to one another and be connected to the GND plane with at
least two through-holes. Place these components as close to
the IC as possible. The next consideration is the location of
the GND connection of the output capacitor C2, which should
be near the GND connections of C1 and D1.
There should be a continuous ground plane on the bottom
layer of a two-layer board except under the switching node
island.
The FB pin is a high impedance node and care should be
taken to make the FB trace short to avoid noise pickup that
causes inaccurate regulation. The LED current setting resis-
tor R1 should be placed as close as possible to the IC, with
the GND of R1 placed as close as possible to the GND of the
IC. The V
trace to LED anode should be routed away from
the inductor and any other traces that are switching.
High AC currents flow through the V
, SW and V
traces,
so they should be as short and wide as possible. Radiated
noise can be decreased by choosing a shielded inductor.
The remaining components should also be placed as close
as possible to the IC. Please see Application Note AN-1229
for further considerations and the LM3405A demo board as
an example of a four-layer layout.
www.national.com
12
L
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