
Application Information
(Continued)
T
J
= T
A
+ (P
DISS
x
θ
JA
)
The junction temperature rating takes precedence over the
ambient temperature rating. The LM27966 may be operated
outside the ambient temperature rating, so long as the junc-
tion temperature of the device does not exceed the maxi-
mum operating rating of 100C. The maximum ambient tem-
perature rating must be derated in applications where high
power dissipation and/or poor thermal resistance causes the
junction temperature to exceed 100C.
THERMAL PROTECTION
Internal thermal protection circuitry disables the LM27966
when the junction temperature exceeds 170C (typ.). This
feature protects the device from being damaged by high die
temperatures that might otherwise result from excessive
power dissipation. The device will recover and operate nor-
mally when the junction temperature falls below 165C (typ.).
It is important that the board layout provide good thermal
conduction to keep the junction temperature within the speci-
fied operating ratings.
CAPACITOR SELECTION
The LM27966 requires 4 external capacitors for proper op-
eration (C
= C
= 1μF, C
= C
= 1μF). Surface-mount
multi-layer ceramic capacitors are recommended. These ca-
pacitors are small, inexpensive and have very low equivalent
series resistance (ESR
<
20m
typ.). Tantalum capacitors,
OS-CON capacitors, and aluminum electrolytic capacitors
are not recommended for use with the LM27966 due to their
high ESR, as compared to ceramic capacitors.
For most applications, ceramic capacitors with X7R or X5R
temperature characteristic are preferred for use with the
LM27966. These capacitors have tight capacitance toler-
ance (as good as
±
10%) and hold their value over tempera-
ture (X7R:
±
15% over -55C to 125C; X5R:
±
15% over
-55C to 85C).
Capacitors with Y5V or Z5U temperature characteristic are
generally not recommended for use with the LM27966. Ca-
pacitors with these temperature characteristics typically
have wide capacitance tolerance (+80%, -20%) and vary
significantly over temperature (Y5V: +22%, -82% over -30C
to +85C range; Z5U: +22%, -56% over +10C to +85C
range). Under some conditions, a nominal 1μF Y5V or Z5U
capacitor could have a capacitance of only 0.1μF. Such
detrimental deviation is likely to cause Y5V and Z5U capaci-
tors to fail to meet the minimum capacitance requirements of
the LM27966.
The minimum voltage rating acceptable for all capacitors is
6.3V. The recommended voltage rating for the input and
output capacitors is 10V to account for DC bias capacitance
losses.
PCB LAYOUT CONSIDERATIONS
The LLP is a leadframe based Chip Scale Package (CSP)
with very good thermal properties. This package has an
exposed DAP (die attach pad) at the center of the package
measuring 2.6mm x 2.5mm. The main advantage of this
exposed DAP is to offer lower thermal resistance when it is
soldered to the thermal land on the PCB. For PCB layout,
National highly recommends a 1:1 ratio between the pack-
age and the PCB thermal land. To further enhance thermal
conductivity, the PCB thermal land may include vias to a
ground plane. For more detailed instructions on mounting
LLP packages, please refer to National Semiconductor Ap-
plication Note AN-1187.
L
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