參數(shù)資料
型號(hào)： LM12L454CIV
英文描述： IC-SM-12 BIT DAS
中文描述： 集成電路的Sm - DAS的12位
文件頁(yè)數(shù)： 17/36頁(yè)
文件大?。?/td> 538K
代理商： LM12L454CIV
Application Information
1.0 Functional Description
The LM12L454 and LM12L458 are multi-functional Data Ac-
quisition Systems that include a fully differential 12-bit-plus-
sign self-calibrating analog-to-digital converter (ADC) with a
two’s-complement output format, an 8-channel (LM12L458)
or a 4-channel (LM12L454) analog multiplexer, a first-in-
first-out (FIFO) register that can store 32 conversion results,
and an Instruction RAM that can store as many as eight
instructions to be sequentially executed. The LM12L454
also has a differential multiplexer output and a differential
S/H input. All of this circuitry operates on only a single
a
3.3V power supply.
The LM12L454/8 have three modes of operation:
12-bit
a
sign with correction
8-bit
a
sign without correction
8-bit
a
sign comparison mode (‘‘watchdog’’ mode)
The fully differential 12-bit-plus-sign ADC uses a charge re-
distribution topology that includes calibration capabilities.
Charge re-distribution ADCs use a capacitor ladder in place
of a resistor ladder to form an internal DAC. The DAC is
used by a successive approximation register to generate
intermediate voltages between the voltages applied to
V
REF
b
and V
REF
a
. These intermediate voltages are com-
pared against the sampled analog input voltage as each bit
is generated. The number of intermediate voltages and
comparisons equals the ADC’s resolution. The correction of
each bit’s accuracy is accomplished by calibrating the ca-
pacitor ladder used in the ADC.
Two different calibration modes are available; one compen-
sates for offset voltage, or zero error, while the other cor-
rects both offset error and the ADC’s linearity error.
When correcting offset only, the offset error is measured
once and a correction coefficient is created. During the full
calibration, the offset error is measured eight times, aver-
aged, and a correction coefficient is created. After comple-
tion of either calibration mode, the offset correction coeffi-
cient is stored in an internal offset correction register.
The LM12L454/8’s overall linearity correction is achieved
by correcting the internal DAC’s capacitor mismatch. Each
capacitor is compared eight times against all remaining
smaller value capacitors and any errors are averaged. A
correction coefficient is then created and stored in one of
the thirteen internal linearity correction registers. An internal
state machine, using patterns stored in an internal 16 x 8-bit
ROM, executes each calibration algorithm.
Once calibrated, an internal arithmetic logic unit (ALU) uses
the offset correction coefficient and the 13 linearity correc-
tion coefficients to reduce the conversion’s offset error and
linearity error, in the background, during the 12-bit
a
sign
conversion. The 8-bit
a
sign conversion and comparison
modes use only the offset coefficient. The 8-bit
a
sign
mode performs a conversion in less than half the time used
by the 12-bit
a
sign conversion mode.
The LM12L454/8’s ‘‘watchdog’’ mode is used to monitor a
single-ended or differential signal’s amplitude. Each sam-
pled signal has two limits. An interrupt can be generated if
the input signal is above or below either of the two limits.
This allows interrupts to be generated when analog voltage
inputs are ‘‘inside the window’’ or, alternatively, ‘‘outside the
window’’. After a ‘‘watchdog’’ mode interrupt, the processor
can then request a conversion on the input signal and read
the signal’s magnitude.
The analog input multiplexer can be configured for any com-
bination of single-ended or fully differential operation. Each
input is referenced to ground when a multiplexer channel
operates in the single-ended mode. Fully differential analog
input channels are formed by pairing any two channels to-
gether.
The LM12L454’s multiplexer outputs and S/H inputs
(MUXOUT
a
, MUXOUT
b
and S/H IN
a
, S/H IN
b
) provide
the option for additional analog signal processing. Fixed-
gain amplifiers, programmable-gain amplifiers, filters, and
other processing circuits can operate on the signal applied
to the selected multiplexer channel(s). If external process-
ing is not used, connect MUXOUT
a
to S/H IN
a
and MUX-
OUT
b
to S/H IN
b
.
The LM12L454/8’s internal S/H is designed to operate at
its minimum acquisition time (1.5
m
s, 12 bits) when the
source impedance, R
S
, is
s
80
X
(f
CLK
s
6 MHz). When
80
X
k
R
S
s
5.56 k
X
, the internal S/H’s acquisition time
can be increased to a maximum of 6.5
m
s (12 bits, f
CLK
e
6 MHz). See Section 2.1 (Instruction RAM ‘‘00’’) Bits 12–15
for more information.
Microprocessor overhead is reduced through the use of the
internal conversion FIFO. Thirty-two consecutive conver-
sions can be completed and stored in the FIFO without any
microprocessor intervention. The microprocessor can, at
any time, interrogate the FIFO and retrieve its contents. It
can also wait for the LM12L454/8 to issue an interrupt
when the FIFO is full or after any number (
s
32) of conver-
sions have been stored.
Conversion sequencing, internal timer interval, multiplexer
configuration, and many other operations are programmed
and set in the Instruction RAM.
A diagnostic mode is available that allows verification of the
LM12L458’s operation. The diagnostic mode is disabled in
the LM12L454. This mode internally connects the voltages
present at the V
REF
a
, V
REF
b
, and GND pins to the internal
V
IN
a
and V
IN
b
S/H inputs. This mode is activated by set-
ting the Diagnostic bit (Bit 11) in the Configuration register to
a ‘‘1’’. More information concerning this mode of operation
can be found in Section 2.2.
17
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
LM12L458 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration
LM12L458_06 制造商:NSC 制造商全稱(chēng):National Semiconductor 功能描述:12-Bit + Sign Data Acquisition System with Self-Calibration
LM12L458CIV 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
LM12L458CIV/NOPB 功能描述:模數(shù)轉(zhuǎn)換器 - ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
LM12L458CIVF 制造商:Rochester Electronics LLC 功能描述:12-BIT PARALLEL I/O DAS - Bulk
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