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參數(shù)資料
| 型號： | LM1276AAA |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
| 中文描述： | 150 MHz的I2C兼容的RGB前置放大器512個字符OSD光盤，512個字符RAM和4 DAC的內置 |
| 文件頁數(shù)： | 44/50頁 |
| 文件大小： | 2597K |
| 代理商： | LM1276AAA |
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Auto Size Registers
(Continued)
Bits 7
Interrupt Enable. This bit must be set to 1 to activate the use of the interrupt bit in 0x8591
HiBrite Status Register:
STATUS (0x8591)
RSV
INTR
RSV
RSV
RSV
RSV
RSV
RSV
Bits 6–0
Bits 7
Reserved and should be set to zero.
This bit is the interrupt bit and must be frequently polled (at least 480ms interval) by the MCU for a
value of 1, and must be also reset by the MCU thereafter. The interrupt bit will automatically be set
high when the software has attempted to send a command to the MCU, with the chip as the
messenger. It must be set back to 0 by the MCU afterwards so that it can be set high the next
time the MCU software makes another attempt to send a command.
MCU Command Register:
MCU COMMAND (0x8592)
MCU COMMAND[7:0]
Bits 7–0
Command. These bits are the MCU command bits.
The MCU must read a value of 0x80 from
this register.
Sub Command Register:
SUB COMMAND (0x8593)
SUB COMMAND[7:0]
Bits 7–0
Sub Command. These bits are the sub command bits. If a value of this register is 0x01: This value
corresponds to a HiBrite Software "UP" command. 0x02: This value corresponds to a HiBrite
"V Blank Duration Adjustment."
Sequence Number:
SEQ NUM (0x859A)
SEQ NUM[7:0]
Bits 7–0
Sequence. These bits are the Sequence number command bits. The MCU should read this register
and take note of the sequence number to compare with the current sequence number. Since an
MCU sub command is continuously transmitted by the software for a duration of time, the interrupt
bit will be set back to high again redundantly, which will falsely notify the MCU of another sub
command. To prevent this, the sequence number which is only updated on truly new commands,
will prevent redundant commands and have the the MCU set the interrupt but low accordingly.
Please see the "MCU Programmer’s Guide"Applications note on more detailed information regarding the use of registers 0x8590
- 0x859A.
Internal PLL Lock Detect Control Register:
STATUS (0xFFF8)
LOCK
ORR
RSV
RSV
LOCK
SET
RSV
RSV
RSV
RSV
Bits 3–0
Bits 5-4
Reserved and should be set to zero.
When enabling the OSD display, these 2 bits must be enabled first, and then disabled when the
OSD display is disabled. This should also be done before performing an auto size calculation.
Reserved and should be set to zero.
Bits 7-6
H INPUT SEL (0xFFFD)
RSV
RSV
RSV
RSV
HSEL
RSV
RSV
RSV
L
44
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