參數(shù)資料
型號(hào)： LM1253AN
廠商： NATIONAL SEMICONDUCTOR CORP
元件分類： 畫面疊加
英文描述： Monolithic Triple 180 MHz I2C CRT Pre-amp With Integrated Analog On Screen Display (OSD) Generator
中文描述： ON-SCREEN DISPLAY IC, PDIP28
封裝： 0.600 INCH, PLASTIC, DIP-28
文件頁數(shù)： 44/57頁
文件大?。?/td> 1621K
代理商： LM1253AN
Control Register Definitions
(Continued)
PRE-AMP INTERFACE REGISTERS
Blue Channel Gain Control Register (I
2
C address 8430h).
REGISTER NAME: BGAINCTRL (8430h)
Bit 7
Bit 0
RSV
BG6
BG5
BG4
BG3
BG2
BG1
BG0
Bits 6–0: Blue Channel Gain Control. These seven bits determine the gain for the Blue Channel.
Bit 7:
RESERVED.
Green Channel Gain Control Register (I
2
C address 8431h).
REGISTER NAME: GGAINCTRL (8431h)
Bit 7
Bit 0
RSV
GG6
GG5
GG4
GG3
GG2
GG1
GG0
Bits 6–0: Green Channel Gain Control. These seven bits determine the gain for the Green Channel.
Bit 7:
RESERVED.
Red Channel Gain Control Register (I
2
C address 8432h).
REGISTER NAME: RGAINCTRL (8432h)
Bit 7
Bit 0
RSV
RG6
RG5
RG4
RG3
RG2
RG1
RG0
Bits 6–0: Red Channel Gain Control. These seven bits determine the gain for the Red Channel.
Bit 7:
RESERVED.
Contrast Control Register (I
2
C address 8433h).
REGISTER NAME: CONTRCTRL (8433h)
Bit 7
Bit 0
RSV
CG6
CG5
CG4
CG3
CG2
CG1
CG0
Bits 6–0: Contrast Gain Control. These six bits determine the overall gain of all three channels.
Bit 7
RESERVED.
Blue Bias Clamp Pulse Amplitude Control Register (I
2
C address 8434h).
REGISTER NAME: BBIASCTRL (8434h)
Bit 7
Bit 0
BC7
BC6
BC5
BC4
BC3
BC2
BC1
BC0
Bits 7–0: Blue Channel Bias Clamp Pulse Amplitude Control. These six bits determine the bias clamp value for its pulse ampli-
tude.
Green Bias Clamp Pulse Amplitude Control Register (I
2
C address 8435h).
REGISTER NAME: GBIASCTRL (8435h)
Bit 7
Bit 0
GC7
GC6
GC5
GC4
GC3
GC2
GC1
GC0
Bits 7–0: Green Channel Bias Clamp Pulse Amplitude Control. These six bits determine the bias clamp value for its pulse am-
plitude.
L
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