參數(shù)資料
型號: LM1247AAG/NA/NOPB
廠商: NATIONAL SEMICONDUCTOR CORP
元件分類: 音頻/視頻放大
英文描述: 3 CHANNEL, VIDEO PREAMPLIFIER, PDIP24
封裝: PLASTIC, DIP-24
文件頁數(shù): 28/48頁
文件大?。?/td> 3141K
代理商: LM1247AAG/NA/NOPB
Control Register Definitions (Continued)
Bits 6–0
This register determines the duration of the vertical blanking signal in scan lines. When vertical blanking is
enabled, it is recommended that this register be set to a number greater than 0x0A.
Bit 7
Reserved. This bit should be set to zero.
Character Height Register:
CHARHTCTRL (0x8404)
CH[7:0]
Bits 7–0
This register determines the OSD character height as described in the section Constant Character Height
Mechanism. The values of this register is equal to the approximate number of OSD height compensated lines
required on the screen, divided by 4. This value is not exact due to the approximation used in scaling the
character.
Example: If approximately 384 OSD lines are required on the screen (regardless of the number of scan lines)
then the Character Height Control Register is programmed with 81 (0x51).
Enhanced Feature Register 1:
Button Box Highlight Color
BBHLCTRLB1 (0x8406)
BBHLCTRLB0 (0x8405)
Reserved
Highlight - Green
Highlight - Red
Highlight - Blue
X
XXXXXX
G[2:0]
R[2:0]
B[2:0]
Bits 8–0
These determine the button box highlight color.
Bits 15–9
Reserved. These bits should be set to zero.
Enhanced Feature Register 2:
Button Box Lowlight Color
BBLLCTRLB1 (0x8408)
BBLLCTRLB0 (0x8407)
Reserved
Lowlight - Green
Lowlight - Red
Lowlight - Blue
X
XXXXXX
G[2:0]
R[2:0]
B[2:0]
Bits 8–0
These determine the button box lowlight color.
Bits 15–9
Reserved. These bits should be set to zero.
Enhanced Feature Register 3:
Heavy Button Box Lowlight/Shading/Shadow
CHSDWCTRLB1 (0x840A)
CHSDWCTRLB0 (0x8409)
Reserved
Shadow - Green
Shadow - Red
Shadow - Blue
X
XXXXXX
G[2:0]
R[2:0]
B[2:0]
Bits 8–0
These registers determine the heavy button box lowlight, shading or shadow color.
Bits 15–9
Reserved. These bits should be set to zero.
ROM Signature Control Register:
ROMSIGCTRL (0x840D)
Reserved
check
X
XXXXXX
CRS
Bit 0
This controls the calculation of the ROM signature. Setting this bit causes the ROM to be read
sequentially and a 16-bit checksum calculated over the 256 characters. The sum, modulo 65535,
is stored in the ROM Signature Data Register, and this bit is then automatically cleared.
Bits 7–1
Reserved. These should be set to zero.
ROM Signature Data:
ROMSIGDATAB1 (0x840F)
ROMSIGDATAB0 (0x840E)
16 Bit Checksum
CRC[15:0]
Bits 15–0
This is the checksum of the 256 ROM characters truncated to 16 bits (modulo 65535). All devices
with the same masked ROM will have the same checksum.
LM1247
www.national.com
34
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