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參數(shù)資料
| 型號： | LM1246NA |
| 廠商： | National Semiconductor Corporation |
| 英文描述： | 150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
| 中文描述： | 150 MHz的I2C兼容的RGB前置放大器512個字符OSD光盤，512個字符RAM和4 DAC的內(nèi)置 |
| 文件頁數(shù)： | 39/51頁 |
| 文件大?。?/td> | 2794K |
| 代理商： | LM1246NA |
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Control Register Definitions
(Continued)
2.
Then, the 3-bit address obtained from B0AD[2:0], B1AD[2:0], B2AD[2:0] and B3AD[2:0] are used to select four of the eight
2 or 4 color ROM banks as shown in
Table 29. Resulting ROM Bank Address
. The BxAD[2:0] column gives the range of
three-bit addresses and the next two columns give the corresponding ROM address range and the character type.
TABLE 29. Resulting ROM Bank Address
BxAD[2:0]
000b
001b
010b
011b
100b
101b
110b
111b
Character ROM Address Range
0x000–0x03F
0x040–0x07F
0x080–0x0BF
0x0C0–0x0FF
0x100–0x13F
0x140–0x17F
0x180–0x1BF
0x1C0–0x1FF
ROM Character Type
2 Color
2 Color
2 Color
4 Color
2 Color
2 Color
2 Color
4 Color
3.
In summary, the final ROM character address is formed by concatenating (combining end to end) the three bits of the
corresponding Bank Address Register with the lower six bits of the original character address in RAM. Since just the two
highest bits of the Page RAM address are used, only 4 banks can be addressed at one time.
Fade In/Fade Out Interval Register:
FADE_INTVL (0x8429)
Vertical Interval
V_INTVL[3:0]
Horizontal Interval
H_INTVL[3:0]
Bits 7–4
These three bits determine the interval for fading in or fading out the OSD window in the vertical
direction.
These three bits determine the interval for fading in or fading out the OSD window in the horizontal
direction.
Bits 3–0
Pre-Amplifier Interface Registers
Blue Channel Gain:
BGAINCTRL (0x8430)
Blue Gain
Res’d
X
BG[6:0]
Bits 6–0
This register determines the gain of the blue video channel. This affects only the blue channel
whereas the contrast register (0x8433) affects all channels.
Reserved and should be set to zero.
Bit 7
Green Channel Gain:
GGAINCTRL (0x8431)
Green Gain
Res’d
X
GG[6:0]
Bits 6–0
This register determines the gain of the green video channel. This affects only the green channel
whereas the contrast register (0x8433) affects all channels.
Reserved and should be set to zero.
Bit 7
Red Channel Gain:
RGAINCTRL (0x8432)
Red Gain
Res’d
X
RG[6:0]
L
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LM1247 | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:150 MHz I2C Compatible RGB Preamplifier with Internal 512 Character OSD ROM, 512 Character RAM and 4 DACs |
| LM1247AAG/NA | 功能描述:IC PREAMP CMOS 150MHZ 24DIP RoHS:否 類別:集成電路 (IC) >> 線性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標準包裝:3,000 系列:OMNITUNE™ 類型:調(diào)諧器 應(yīng)用:移動電話，手機，視頻顯示器 安裝類型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱:SP000365064 |
| LM1247DMC/NA | 制造商:Texas Instruments 功能描述: |
| LM124A | 制造商:NSC 制造商全稱:National Semiconductor 功能描述:Low Power Quad Operational Amplifiers |
| LM124AD | 制造商:STMICROELECTRONICS 制造商全稱:STMicroelectronics 功能描述:LOW POWER QUAD OPERATIONAL AMPLIFIERS |
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