參數(shù)資料
型號: LIS3LV02DQ-TR
廠商: STMICROELECTRONICS
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PQCC28
封裝: 7 X 7 MM, 1.9 MM HEIGHT, PLASTIC, QFN-28
文件頁數(shù): 28/42頁
文件大?。?/td> 379K
代理商: LIS3LV02DQ-TR
7 Register Description
LIS3LV02DQ
34/42
CD00047926
7.25
DD_CFG (38h)
Direction-detector configuration register
IEND
LIR
ZHIE
ZLIE
YHIE
YLIE
XHIE
XLIE
IEND
Interrupt enable on Direction change. Default value: 0
(0: disabled;
1: interrupt signal enabled)
LIR
Latch Interrupt request into DD_SRC reg with the DD_SRC reg cleared by reading
DD_ACK reg. Default value: 0.
(0: interrupt request not latched;
1: interrupt request latched)
ZHIE
Enable interrupt generation on Z high event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value higher than preset threshold)
ZLIE
Enable interrupt generation on Z low event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value lower than preset threshold)
YHIE
Enable interrupt generation on Y high event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value higher than preset threshold)
YLIE
Enable interrupt generation on Y low event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value lower than preset threshold)
XHIE
Enable interrupt generation on X high event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value higher than preset threshold)
XLIE
Enable interrupt generation on X low event. Default value: 0
(0: disable interrupt request;
1: enable interrupt request on measured accel. value lower than preset threshold)
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