參數(shù)資料
型號: LIS35DE
廠商: STMICROELECTRONICS
元件分類: 模擬信號調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PBGA14
封裝: 3 X 5 MM, 0.92 MM HEIGHT, 0.80 MM PITCH, GREEN, PLASTIC, LGA-14
文件頁數(shù): 8/39頁
文件大?。?/td> 650K
代理商: LIS35DE
Application hints
LIS35DE
16/39
Doc ID 15594 Rev 1
4
Application hints
Figure 5.
LIS35DE electrical connection
The device core is supplied through Vdd line while the I/O pads are supplied through
Vdd_IO line. Power supply decoupling capacitors (100 nF ceramic, 10 F Al) should be
placed as near as possible to the pin 6 of the device (common design practice).
All the voltage and ground supplies must be present at the same time to have proper
behavior of the IC (refer to
Figure 5). It is possible to remove Vdd maintaining Vdd_IO
without blocking the communication busses, in this condition the measurement chain is
powered off.
The functionality of the device and the measured acceleration data is selectable and
accessible through the I2C/SPI interface.When using the I2C, CS must be tied high.
The functions, the threshold and the timing of the two interrupt pins (INT 1 and INT 2) can be
completely programmed by the user though the I2C/SPI interface.
4.1
Soldering information
The LGA package is compliant with the ECOPACK, RoHS and “Green” standard. It is
qualified for soldering heat resistance according to JEDEC J-STD-020C.
Leave “Pin 1 Indicator” unconnected during soldering.
Land pattern and soldering recommendation are available at www.st.com.
6
8
13
1
Top VIEW
CS
10uF
Vdd
100nF
GND
Vdd_IO
SDO
SDA/SDI/SDO
IN
T
1
IN
T
2
SCL/SPC
Digital signal from/to signal controller.Signal’s levels are defined by proper selection of Vdd_IO
1
13
8
6
TOP VIEW
X
Z
Y
DIRECTIONS OF THE
DETECTABLE
ACCELERATIONS
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