參數(shù)資料
型號(hào)： LIS33DE
廠商： STMICROELECTRONICS
元件分類： 模擬信號(hào)調(diào)理
英文描述： SPECIALTY ANALOG CIRCUIT, PBGA16
封裝： 3 X 3 MM, 1 MM HEIGHT, GREEN, PLASTIC, LGA-16
文件頁數(shù)： 8/31頁
文件大小： 532K
代理商： LIS33DE
Digital interfaces
LIS33DE
16/31
Doc ID 15596 Rev 1
5
Digital interfaces
The registers embedded inside the LIS33DE may be accessed through both the I2C and
SPI serial interfaces. The latter may be SW configured to operate either in 3-wire or 4-wire
interface mode.
The serial interfaces are mapped onto the same pads. To select/exploit the I2C interface, CS
line must be tied high (i.e connected to Vdd_IO).
5.1
I2C serial interface
The LIS33DE I2C is a bus slave. The I2C is employed to write data into registers whose
content can also be read back.
The relevant I2C terminology is given in the table below.
There are two signals associated with the I2C bus: the serial clock line (SCL) and the serial
DAta line (SDA). The latter is a bidirectional line used for sending and receiving the data
to/from the interface. Both the lines are connected to Vdd_IO through a pull-up resistor
embedded inside the LIS33DE. When the bus is free both the lines are high.
The I2C interface is compliant with fast mode (400 KHz) I2C standards as well as with the
normal mode.
Table 8.
Serial interface pin description
Pin name
Pin description
CS
SPI enable
I2C/SPI mode selection (1: I2C mode; 0: SPI enabled)
SCL/SPC
I2C serial clock (SCL)
SPI serial port clock (SPC)
SDA/SDI/SDO
I2C serial data (SDA)
SPI serial data input (SDI)
3-wire interface serial data output (SDO)
SDO
SPI serial data output (SDO)
Table 9.
Serial interface pin description
Term
Description
Transmitter
The device which sends data to the bus
Receiver
The device which receives data from the bus
Master
The device which initiates a transfer, generates clock signals and terminates a
transfer
Slave
The device addressed by the master
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