參數(shù)資料
型號(hào): LIS33DE
廠商: STMICROELECTRONICS
元件分類: 模擬信號(hào)調(diào)理
英文描述: SPECIALTY ANALOG CIRCUIT, PBGA16
封裝: 3 X 3 MM, 1 MM HEIGHT, GREEN, PLASTIC, LGA-16
文件頁(yè)數(shù): 17/31頁(yè)
文件大?。?/td> 532K
代理商: LIS33DE
Register description
LIS33DE
24/31
Doc ID 15596 Rev 1
7.2
CTRL_REG2 (21h)
Table 18.
CTRL_REG2 (21h) register
Table 19.
CTRL_REG2 (21h) register description
SIM bit selects the SPI serial interface mode. When SIM is ‘0’ (default value) the 4-wire
interface mode is selected. The data coming from the device are sent to SDO pad. In 3-wire
interface mode output data are sent to SDA_SDI pad.
BOOT bit is used to refresh the content of internal registers stored in the flash memory
block. At the device power up the content of the flash memory block is transferred to the
internal registers related to trimming functions to permit a good behavior of the device itself.
If for any reason the content of trimming registers is changed it is sufficient to use this bit to
restore correct values. When BOOT bit is set to ‘1’ the content of internal flash is copied
inside corresponding internal registers and it is used to calibrate the device. These values
are factory trimmed and they are different for every accelerometer. They permit a good
behavior of the device and normally they have not to be changed. At the end of the boot
process the BOOT bit is set again to ‘0’.
7.3
CTRL_REG3 [Interrupt CTRL register] (22h)
SIM
BOOT
0(1)
1.
Bit to be kept to “0” for correct device functionality.
0(1)
SIM
SPI serial interface mode selection. Default value: 0
(0: 4-wire interface; 1: 3-wire interface)
BOOT
Reboot memory content. Default value: 0
(0: normal mode; 1: reboot memory content)
Table 20.
CTRL_REG3 (22h) register
IHL
0(1)
1.
Bit to be kept to “0” for correct push-pull on Interrupt pad (INT).
0(2)
2.
Bit to be kept to “0” for correct device functionality.
0(2)
ICFG2
ICFG1
ICFG0
Table 21.
CTRL_REG3 (22h) register description
IHL
Interrupt active high, low. Default value 0.
(0: active high; 1: active low)
ICFG2-
ICFG0
Data signal on INT pad control bits. Default value 000.
(see table below)
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