參數(shù)資料
型號： LH79524N0F100A1
廠商： NXP Semiconductors N.V.
元件分類： 數(shù)學處理器
英文描述： System-on-Chip
封裝： LH79524N0F100A1<SOT1019-1 (LFBGA208)|<<http://www.nxp.com/packages/SOT1019-1.html<1<Always Pb-free,;LH79525N0Q100A1<SOT1017-1 (LQFP176)|<<http://www.nxp.com/packages/SOT1
文件頁數(shù)： 15/64頁
文件大?。?/td> 970K
代理商： LH79524N0F100A1
System-on-Chip
LH79524/LH79525
Preliminary data sheet
Rev. 01
—
16 July 2007
15
NXP Semiconductors
53
PC6/A22/nFWE
I/O
General Purpose I/O Signal — Port C6; multiplexed with Address A22 and NAND
Flash Write Enable
General Purpose I/O Signal — Port C7; multiplexed with Address A23 and NAND
Flash Read Enable
General Purpose I/O Signal — Port D0; multiplexed with Data D8
General Purpose I/O Signal — Port D1; multiplexed with Data D9
General Purpose I/O Signal — Port D2; multiplexed with Data D10
General Purpose I/O Signal — Port D3; multiplexed with Data D11
General Purpose I/O Signal — Port D4; multiplexed with Data D12
General Purpose I/O Signal — Port D5; multiplexed with Data D13
General Purpose I/O Signal — Port D6; multiplexed with Data D14
General Purpose I/O Signal — Port D7; multiplexed with Data D15
General Purpose I/O Signals — Port E0; multiplexed with LCD Line Pulse and
AD-TFT/HR-TFT Line Pulse
General Purpose I/O Signals — Port E1; multiplexed with LCD Data Clock
General Purpose I/O Signals — Port E2; multiplexed with LCD Power Save
General Purpose I/O Signals — Port E3; multiplexed with LCD Row Driver Clock
General Purpose I/O Signals — Port E4; multiplexed with LCD Panel Power
Enable and LCD Reverse
General Purpose I/O Signals — Port E5; multiplexed with LCD VDD Enable
General Purpose I/O Signals — Port E6; multiplexed with LCD Analog Power
Enable and MOD
General Purpose I/O Signals — Port E7; multiplexed with nWAIT and DMA
End of Transfer
General Purpose I/O Signals — Port F0; multiplexed with LCD Video Data bit 6
General Purpose I/O Signals — Port F1; multiplexed with LCD Video Data bit 7
General Purpose I/O Signals — Port F2; multiplexed with LCD Video Data bit 8
General Purpose I/O Signals — Port F3; multiplexed with LCD Video Data bit 9
General Purpose I/O Signals — Port F4; multiplexed with LCD Video Data bit 10
General Purpose I/O Signals — Port F5; multiplexed with LCD Video Data bit 11
52
PC7/A23/nFRE
I/O
90
89
88
87
85
84
83
82
PD0/D8
PD1/D9
PD2/D10
PD3/D11
PD4/D12
PD5/D13
PD6/D14
PD7/D15
PE0/LCDLP/
LCDHRLP
PE1/LCDDCLK
PE2/LCDPS
PE3/LCDCLS
PE4/LCDDSPLEN/
LCDREV
PE5/LCDVDDEN
PE6LCDVEEN/
LCDMOD
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
141
I/O
139
138
137
I/O
I/O
I/O
136
I/O
134
I/O
133
I/O
120
PE7/nWAIT/nDEOT
I/O
153
151
149
147
146
145
PF0/LCDVD6
PF1/LCDVD7
PF2/LCDVD8
PF3/LCDVD9
PF4/LCDVD10
PF5/LCDVD11
PF6/LCDEN/
LCDSPL
PF7/LCDFP/
LCDSPS
PG0/ETHERTXEN
PG1/ETHERTXCLK
PG2/LCDVD0
PG3/LCDVD1
PG4/LCDVD2
PG5/LCDVD3
PG6/LCDVD4
PG7/LCDVD5
PH0/ETHERRX3
PH1/ETHERRXDV
PH2/ETHERRXCLK
PH3/ETHERTXER
PH4/ETHERTX0
PH5/ETHERTX1
I/O
I/O
I/O
I/O
I/O
I/O
143
I/O
General Purpose I/O Signals — Port F6; multiplexed with LCD Start Pulse Left
142
I/O
General Purpose I/O Signals — Port F7; multiplexed with LCD Row Driver Counter reset
162
161
159
158
157
156
155
154
171
170
169
167
166
165
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
I/O
General Purpose I/O Signals — Port G0; multiplexed with Ethernet Transmit Enable
General Purpose I/O Signals — Port G1; multiplexed with Ethernet Clock
General Purpose I/O Signals — Port G2; multiplexed with LCD Video Data bit 0
General Purpose I/O Signals — Port G3; multiplexed with LCD Video Data bit 1
General Purpose I/O Signals — Port G4; multiplexed with LCD Video Data bit 2
General Purpose I/O Signals — Port G5; multiplexed with LCD Video Data bit 3
General Purpose I/O Signals — Port G6; multiplexed with LCD Video Data bit 4
General Purpose I/O Signals — Port G7; multiplexed with LCD Video Data bit 5
General Purpose I/O Signals — Port H0; multiplexed with Ethernet Receive Channel 3
General Purpose I/O Signals — Port H1; multiplexed with Ethernet Data Valid
General Purpose I/O Signals — Port H2; multiplexed with Ethernet Receive Clock
General Purpose I/O Signals — Port H3; multiplexed with Ethernet Transmit Error
General Purpose I/O Signals — Port H4; multiplexed with Ethernet Transmit Channel 0
General Purpose I/O Signals — Port H5; multiplexed with Ethernet Transmit Channel 1
164
PH6/ETHERTX2
I/O
General Purpose I/O Signals — Port H6; multiplexed with Ethernet Transmit Channel 2
Table 5. LH79525 Pin Descriptions (Cont’d)
PIN NO.
SIGNAL NAME
TYPE
DESCRIPTION
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相關代理商/技術參數(shù)
參數(shù)描述
LH79524N0F100A1,55 功能描述:ARM微控制器 - MCU LCD,USB,ETH’NET,MMU,ADC,BGA208 RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT
LH79524N0F100A1,551 制造商:NXP Semiconductors 功能描述:
LH79524N0F100A1;55 功能描述:ARM微控制器 - MCU LCD USB ETH’NET MMU RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT
LH79524N0F100A1-S 功能描述:ARM微控制器 - MCU ARM7 LCD MMU ENET RoHS:否 制造商:STMicroelectronics 核心:ARM Cortex M4F 處理器系列:STM32F373xx 數(shù)據(jù)總線寬度:32 bit 最大時鐘頻率:72 MHz 程序存儲器大小:256 KB 數(shù)據(jù) RAM 大小:32 KB 片上 ADC:Yes 工作電源電壓:1.65 V to 3.6 V, 2 V to 3.6 V, 2.2 V to 3.6 V 工作溫度范圍:- 40 C to + 85 C 封裝 / 箱體:LQFP-48 安裝風格:SMD/SMT
LH79525 制造商:PHILIPS 制造商全稱:NXP Semiconductors 功能描述:System-on-Chip
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