
LH155BA
11
2.1.3. DATA IDENTIFICATION
The LH155BA can identify the data of 8-bit data bus
by combinations of RS, RDB and WRB signals.
RS
68-FAMILY
R/W
1
0
1
80-FAMILY
RDB
0
1
0
FUNCTION
WRB
1
0
1
1
1
0
Reads from internal register
Writes to internal register
Reads from display data RAM
0
0
1
0
Writes to display data RAM
2.1.4. SERIAL INTERFACE
The serial interface of LH155BA can accept inputs
of SDA and SCL in the chip selection state (CSB =
"L"). When not in the chip selection state, the
internal shift register and counter are reset to their
initial condition.
Serial data SDA are input sequentially in order of
D
7
to D
0
at the rising edge of serial clock (SCL)
and are converted into 8-bit parallel data (by serial
to parallel conversion) at the rising edge of the 8th
serial clock, being processed in accordance with
the data. The identification whether the serial data
inputs (SDA) are display data or commands is
judged by input to RS pin.
RS = "L" : Display data
RS = "H" : Commands
After completing 8-bit data transferring, or when
making no access, be sure to set serial clock input
(SCL) to "L".
Protection of SDA and SCL signals against external
noise should be taken in actual wiring. To prevent
the successive recognition errors of transferring
data from external noise, release the chip selection
state (CSB = "H") at every completion of 8-bit data
transferring.
Valid
D
0
RS
SCL
SDA
CSB
D
1
D
2
D
3
D
4
D
5
D
6
D
7
8
7
6
5
4
3
2
1