參數資料
型號: LFECP33E-3FN484I
廠商: Lattice Semiconductor Corporation
文件頁數: 108/163頁
文件大小: 0K
描述: IC FPGA 32.8KLUTS 484FPBGA
產品培訓模塊: LatticeECP3 Introduction
標準包裝: 60
系列: ECP
邏輯元件/單元數: 32800
RAM 位總計: 434176
輸入/輸出數: 360
電源電壓: 1.14 V ~ 1.26 V
安裝類型: 表面貼裝
工作溫度: -40°C ~ 100°C
封裝/外殼: 484-BBGA
供應商設備封裝: 484-FPBGA(23x23)
3-13
DC and Switching Characteristics
LatticeECP/EC Family Data Sheet
Derating Timing Tables
Logic Timing provided in the following sections of the data sheet and the ispLEVER design tools are worst-case
numbers in the operating range. Actual delays at nominal temperature and voltage for best-case process, can be
much better than the values given in the tables. To calculate logic timing numbers at a particular temperature and
voltage multiply the noted numbers with the derating factors provided below.
The junction temperature for the FPGA depends on the power dissipation by the device, the package thermal char-
acteristics (
JA), and the ambient temperature, as calculated with the following equation:
TJMAX = TAMAX + (Power * JA)
The user must determine this temperature and then use it to determine the derating factor based on the following
derating tables: TJ °C.
Table 3-5. Delay Derating Table for Internal Blocks
TJ °C
Commercial
TJ °C
Industrial
Power Supply Voltage
1.14V1.2V1.26V
-40
0.82
0.77
0.71
-25
0.82
0.76
0.71
0
20
0.890.830.78
25
45
0.93
0.87
0.81
85
105
1.00
0.94
0.89
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