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參數(shù)資料
| 型號： | LCK4950 |
| 英文描述： | Low-Voltage PLL Clock Driver |
| 中文描述： | 低電壓PLL時鐘驅動器 |
| 文件頁數(shù)： | 4/16頁 |
| 文件大?。?/td> | 215K |
| 代理商： | LCK4950 |
4
Agere Systems Inc.
Data Sheet
November 2001
Low-Voltage PLL Clock Driver
LCK4950
Functional Description
(continued)
Table 2. Function Table
Note: x = fVCO/4; 200 MHz < fVCO < 480 MHz.
Table 3. PLL Input Reference Characteristics
* Maximum and minimum input reference is limited by the V
CO
lock range and the feedback divider for the TCLK or xtal1 inputs.
See the Applications section for more crystal information.
Inputs
Outputs
Totals
fsela
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
1
fselb
0
0
0
0
1
1
1
1
0
0
0
0
1
1
1
1
fselc
0
0
1
1
0
0
1
1
0
0
1
1
0
0
1
1
fseld
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
Qa(1)
2x
2x
2x
2x
2x
2x
2x
2x
x
x
x
x
x
x
x
x
Qb(1)
x
x
x
x
x/2
x/2
x/2
x/2
x
x
x
x
x/2
x/2
x/2
x/2
Qc(2)
x
x
x/2
x/2
x
x
x/2
x/2
x
x
x/2
x/2
x
x
x/2
x/2
Qd(5)
x
x/2
x
x/2
x
x/2
x
x/2
x
x/2
x
x/2
x
x/2
x
x/2
Total 2x
1
1
1
1
1
1
1
1
0
0
0
0
0
0
0
0
Total x
8
3
6
1
7
2
3
0
9
4
7
2
8
3
6
1
Total x/2
0
5
2
7
1
6
5
8
0
5
2
7
1
6
3
8
Characteristic
Symbol
t
r
, t
f
f
ref
f
Xtal
f
refdc
Min
—
—
*
12.5
25
Max
3.0
—
*
25
75
Unit
ns
MHz
MHz
%
TCLK Input Rise/Falls
Reference Input Frequency
Crystal Oscillator Frequency
Reference Input Duty Cycle
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