參數(shù)資料
型號(hào): LC877424A
廠商: Sanyo Electric Co.,Ltd.
英文描述: 8 Bit Single Chip Microcontroller Incorporating 48K/40K/32K/24K Byte ROM and 1536 byte RAM on Chip
中文描述: 8位單片機(jī)微控制器納入48K/40K/32K/24K字節(jié)ROM和1536字節(jié)的片上內(nèi)存
文件頁(yè)數(shù): 17/22頁(yè)
文件大?。?/td> 342K
代理商: LC877424A
LC877448A/40A/32A/24A
No.7776-17/22
Continued from preceding page.
Parameter
Symbol
Pins
Conditions
VDD [V]
min
typ
max
unit
IDDHALT7
4.5 to 6.0
1500
3600
IDDHALT8
HALT mode
FmCF=0Hz
(No oscillation)
FsX’tal=32.768kHz
crystal oscillation
Internal RC oscillation
stopped
System clock: 1MHz
with frequency variable
RC oscillation
Divider : 1/2
2.5 to 4.5
1250
3300
IDDHALT9
4.5 to 6.0
25
100
Current
consumption during
HALT mode
(Note 4)
IDDHALT10
VDD1=VDD2=VDD3
HALT mode
FmCF=0Hz
(Oscillation stop)
FsX’tal=32.768kHz
crystal oscillation
System clock:
32.768kHz
Internal RC oscillation
stopped
Frequency variable RC
oscillation stopped
Divider : 1/2
2.5 to 4.5
12
60
μ
A
IDDHOLD1
4.5 to 6.0
0.05
25
Current
consumption during
HOLD mode
IDDHOLD2
VDD1
HOLD mode
CF1=VDD or open
(when using external
clock)
2.5 to 4.5
0.015
20
IDDHOLD3
4.5 to 6.0
20
90
Current
consumption during
Date / time clock
HOLD mode
IDDHOLD4
VDD1
Date / time clock HOLD
mode
CF1=VDD or open
(when using external
clock)
FmX’tal=32.768kHz
crystal oscillation
2.5 to 4.5
8
50
μ
A
(Note 4) The currents through the output transistors and the pull-up MOS transistors are ignored.
Main system clock oscillation circuit characteristics
The characteristics in the table bellow is based on the following conditions:
1. Use the standard evaluation board SANYO has provided.
2. Use the peripheral parts with indicated value externally.
3. The peripheral parts value is a recommended value of oscillator manufacturer.
Table 1. Main system clock oscillation circuit characteristics using ceramic resonator
Circuit parameters
Oscillation stabilizing time
Frequency
Manufacturer
Oscillator
C1
[pF]
C2
[pF]
Rd1
[
]
Operating supply
voltage range
[V]
typ
[mS]
max
[mS]
Notes
CSTLS10M0G53-B0
(15)
(15)
220
4.5 to 6.0
0.04
0.2
Built-in C1, C2
10MHz
Murata
CSTCE10M0G52-R0
(10)
(10)
330
4.5 to 6.0
0.04
0.2
Built-in C1, C2
CSTLS4M00G53-B0
(15)
(15)
820
2.5 to 6.0
0.04
0.2
Built-in C1, C2
4MHz
Murata
CSTCR4M00G53-R0
(15)
(15)
820
2.5 to 6.0
0.6
0.3
Built-in C1, C2
The oscillation stabilizing time is a period until the oscillation becomes stable after VDD becomes higher than
minimum operating voltage. (Refer to Figure 4)
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