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參數(shù)資料
| 型號： | LC866524A |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Quadruple 2-Input Positive-OR Gates 14-TSSOP -40 to 85 |
| 中文描述： | 四2正輸入或門 14-TSSOP封裝；-40℃到85℃ |
| 文件頁數(shù)： | 7/21頁 |
| 文件大小： | 641K |
| 代理商： | LC866524A |
LC866548/40/32/28/24A
No.6700-7/21
LC866548A/40A/32A/28A/24A Pin Description
Pin Name
I/O
VSS1, 2
Power pin (-)
VDD1,2,3,4
Power pin (+)
VP
Power pin (+) for the VFD output pull-down resist
Port 0
P00 - P07
Input/output in nibble units
Input for port 0 interrupt
Input for HOLD release
15V withstand at N-channel open drain output
Function Description
Option
*1
*1
Pull-up resistor :
Provided/Not provided (each nibble)
Output form :
CMOS/N-channel open drain
(each bit)
Output form :
CMOS/N-channel open drain
(each bit)
I/O
8-bit input/output port
Port 1
P10 - P17
8-bit Input/output port
Input/output can be specified in bit unit.
Other pin functions
P10
P11
P12
P13
P14
P15
P16
P17
Timer1 output (PWM0 output)
8-bit input/output port
Input/output in bit unit
15V withstand at N-channel open drain output
SIO0 data output
SIO0 data input/bus input/output
SIO0 clock input/output
SIO1 data output
SIO1 data input/bus input/output
SIO1 clock input/output
Buzzer output
I/O
Output form :
CMOS/N-channel open drain
(each bit)
Port 3
P30 - P37
I/O
Port 7
P70 - P73
P74
- P75
4-bit input/output port
Input/output in bit unit
2-bit input port
Other pin function
P70
P71
P72
P73
P74
P75
INT0 input/HOLD release /Nch-Tr.
output for watchdog timer
INT1 input/HOLD release input
INT2 input/timer 0 event input
INT3 input with noise filter/timer 0
event input
Input pin XT1 for 32.768kHz crystal
resonator oscillation
Output pin XT2 for 32.768kHz
crystal resonator oscillation
Interrupt received form, vector address
rising
falling
rising/
falling
disable
disable
enable
enable
H level
L level
Vector
I/O
I
INT0
INT1
INT2
INT3
4-bit input/output port
Input/output in bit unit
4-bit input port
Other function
AD input port (8 port pins)
Output for VFD display controller
segment/timing in common
enable
enable
enable
enable
enable
enable
enable
enable
enable
enable
disable
disable
enable
enable
disable
disable
03H
0BH
13H
1BH
Port 8
P80 - P83
P84 - P87
I
I/O
S0/T0 to
S6/T6
O
Pull-down resistor :
Provided/Not provided (each bit)
(continue)
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