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參數(shù)資料
| 型號： | LC865504B |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Octal Buffers/Drivers With 3-State Outputs 20-TSSOP -40 to 85 |
| 中文描述： | 8位單片機微控制器片20/16/12/08/04K-Byte ROM和512字節(jié)RAM |
| 文件頁數(shù)： | 12/19頁 |
| 文件大?。?/td> | 640K |
| 代理商： | LC865504B |
LC863532A/28A/24A/20A/16A
No.6844-12/19
4. IIC Input/Output Conditions at Ta=-10
°
C to +70
°
C, VSS=0V
Standard
min.
0
4.7
4.0
4.7
4.0
4.7
0
250
-
-
4.0
High speed
min.
0
1.3
0.6
1.3
0.6
0.6
0
100
20+0.1Cb
20+0.1Cb
0.6
Parameter
Symbol
max.
100
-
-
-
-
-
-
-
1000
300
-
max.
400
-
-
-
-
-
0.9
-
300
300
-
unit
SCL Frequency
BUS free time between stop - start
HOLD time of start, restart condition
L time of SCL
H time of SCL
Set-up time of restart condition
HOLD time of SDA
Set-up time of SDA
Rising time of SDA, SCL
Falling time of SDA, SCL
Set-up time of stop condition
f
SCL
t
BUF
t
HD;STA
t
LOW
t
HIGH
t
SU;STA
t
HD;DAT
t
SU;DAT
t
R
t
F
t
SU;STO
Refer to figure 7
kHz
μ
s
μ
s
μ
s
μ
s
μ
s
μ
s
ns
ns
ns
μ
s
(Note)
5. Pulse Input Conditions at Ta=-10
°
C to +70
°
C, VSS=0V
Cb : Total capacitance of all BUS (unit : pF)
Ratings
typ.
Parameter
Symbol
Pins
Conditions
VDD[V]
4.5 to 5.5
min.
1
max.
unit
tPIH(1)
tPIL(1)
tPIH(2)
tPIL(2)
INT0, INT1
INT2/T0IN
INT3/T0IN
(1 t
CYC
is
selected for noise
rejection clock.)
INT3/T0IN
(16 t
CYC
is
selected for noise
rejection clock.)
INT3/T0IN
(64 t
CYC
is
selected for noise
rejection clock.)
RES
HS
,
VS
Interrupt acceptable
Timer0-countable
Interrupt acceptable
Timer0-countable
4.5 to 5.5
2
tPIH(3)
tPIL(3)
Interrupt acceptable
Timer0-countable
4.5 to 5.5
32
tPIH(4)
tPIL(4)
Interrupt acceptable
Timer0-countable
4.5 to 5.5
128
t
CYC
tPIL(5)
tPIH(6)
tPIL(6)
Reset acceptable
Display position
controllable (Note)
The active edge of
HS
and
VS
must
be apart at least
1 t
CYC
.
Refer to figure 6.
Refer to figure 6.
4.5 to 5.5
4.5 to 5.5
200
8
High/low level
pulse width
μ
s
Rising/falling
time
tTHL
tTLH
HS
4.5 to 5.5
500
ns
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