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參數(shù)資料
| 型號(hào)： | LC80101M |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Special-Purpose Descrambler LSI for Use In VICS Systems.(用于VICS系統(tǒng)的特殊用途密碼器LSI) |
| 中文描述： | 特殊的利用目的解擾器大規(guī)模集成電路在VICS系統(tǒng)。（用于VICS系統(tǒng)的特殊用途密碼器大規(guī)模集成電路） |
| 文件頁數(shù)： | 7/9頁 |
| 文件大?。?/td> | 162K |
| 代理商： | LC80101M |
External Interface Basic Timing
Figure 1
Figure 2
Figure 1 shows how the timing changes between the LC72700E INT-R output and this LSI’s INT-R2 output. This LSI
requires the period indicated as “Note 1”, about 160 μs, following the detection of a falling edge on the INT-R signal to
set up the descrambling processing. It outputs a falling edge on INT-R2 after the note 1 time has elapsed. Serial data
reads and writes are disabled during this period.
Figure 2 shows the basic timing for the external interface. When this LSI is not used and the system is operated based on
the INT-R trigger, if only horizontal data is output, there will be a data readout guaranteed period of 18 – 0.068 = 17.932
ms, and if both horizontal and vertical data are read out, there will be two 9 – 0.068 = 8.932 ms data readout guaranteed
periods, one each for horizontal and vertical data output. When this LSI is used and the system is operated based on the
INT-R2 trigger, these data readout guaranteed periods are shortened by exactly the amount the INT-R2 signal is delayed,
namely 160 μs. When only horizontal data is output, the data readout guaranteed period will be 17.932 – 0.160 = 17.772
ms, and both horizontal and vertical data is output, the data readout guaranteed periods will be 8.932 – 0.160 = 8.772 ms
for both horizontal and vertical data output.
No. 5438-7/9
LC80101M
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