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參數(shù)資料
| 型號： | LC80101M |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Special-Purpose Descrambler LSI for Use In VICS Systems.(用于VICS系統(tǒng)的特殊用途密碼器LSI) |
| 中文描述： | 特殊的利用目的解擾器大規(guī)模集成電路在VICS系統(tǒng)。（用于VICS系統(tǒng)的特殊用途密碼器大規(guī)模集成電路） |
| 文件頁數(shù)： | 4/9頁 |
| 文件大小： | 162K |
| 代理商： | LC80101M |
Pin Assignment
Notes on the pull-up resistor used between the LC72700E pin 32 (DO) and this LSI’s pin 5 (DI1)
The value of the pull-up resistor Rp1 must be determined based on the printed circuit board’s floating capacitance and the
LC80101M’s clock. The time t
CL
for the LC80101M clock is 1.1 μs (corresponding to 450 kHz). This clock is used as
the readout clock output to the LC72700E during the period discussed in note 1 for the basic timing of the external
interface as discussed on page 7. If the t
CL
of the CL2 clock from the microprocessor is longer than the t
CL
of the
LC80101M clock, a t
CL
of 1.1 μs must be used in the formulas below. If the t
CL
of that clock is shorter than that of the
LC80101M clock, then the t
CL
of CL2 must be substituted in the formulas below.
For example, in the configuration shown in the figure above, assuming the t
CL
of CL2 is 1.0 μs (i.e. CL2 = 500 kHz),
then:
T = t
CL
– 555 ns (the LC72700E data output time)
Since
T
≈
2.2 (C1 + C2) R
Rp1
≈
Assuming that C1 = 10 pF and C2 = 10 pF, then Rp1 will be
≤
10.1 k
. These considerations must be used as guidelines
when determining the value of the pull-up resistor Rp1.
No. 5438-4/9
LC80101M
445 ns
2.2 (C1 + C2)
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