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參數(shù)資料
| 型號(hào)： | LC7872E |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | CD Graphics Decoder |
| 中文描述： | 光盤圖形解碼器 |
| 文件頁(yè)數(shù)： | 3/17頁(yè) |
| 文件大小： | 299K |
| 代理商： | LC7872E |
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Specifications
Absolute Maximum Ratings
at Ta = 25°C, V
SS
= 0 V
Allowable Operating Ranges
at Ta = 25°C, V
SS
= 0 V
Electrical Characteristics
at Ta = 25°C, V
SS
= 0 V, V
DD
= 5 V
No. 4868-3/17
LC7872E
Parameter
Symbol
Conditions
Ratings
Unit
Maximum supply voltage
V
DD
max
V
IN
max
V
OUT
max
Pd max
V
SS
– 0.3 to +7.0
V
SS
– 0.3 to V
DD
+ 0.3
V
SS
– 0.3 to V
DD
+ 0.3
V
Maximum input voltage
V
Maximum output voltage
V
Allowable power dissipation
300
mW
Operating temperature
Topr
–30 to +85
°C
Storage temperature
Tstg
–40 to +125
°C
Parameter
Symbol
Conditions
min
typ
max
Unit
Supply voltage
V
DD
V
IH
(1)
V
DD
1, V
DD
2
RESET
4.5
5.5
V
0.7 V
DD
V
DD
V
Input high level voltage
V
IH
(2)
SFSY, PW, SBSY, CE, DI, CL, MUTE, DB0 to DB3,
PALID, HRESET, VRESET, N/P1, N/P2, SON
2.2
V
DD
V
V
IH
(3)
V
IL
(1)
S1, S2, CB, TEST, TEST1, LINE, DEN
0.8 V
DD
V
SS
V
DD
V
RESET
0.3 V
DD
V
Input low level voltage
V
IL
(2)
SFSY, PW, SBSY, CE, DI, CL, MUTE, DB0 to DB3,
PALID, HRESET, VRESET, N/P1, N/P2, SON
V
SS
0.8
V
V
IL
(3)
t
H
t
L
t
DS
t
DH
t
CP
t
CS
t
CH
t
DOS
fin (1)
S1, S2, CB, TEST, TEST1, LINE, DEN
V
SS
400
0.2 V
DD
V
High level clock pulse width
CL: Figure 1
ns
Low level clock pulse width
CL: Figure 1
400
ns
Data setup time
CL, DI: Figure 1
200
ns
Data hold time
CL, DI: Figure 1
200
ns
CE wait time
CE, CL: Figure 1
400
ns
CE setup time
CE, CL: Figure 1
400
ns
CE hold time
CE, CL: Figure 1
400
ns
DO setup time
CL, DO: Figure 1
130
300
ns
XIN1
14.31818
MHz
fin (2)
XIN2
17.734476
MHz
Input frequency
fin (3)
4FSC2
NTSC mode
14.31818
MHz
PAL mode
17.734476
MHz
fin (4)
FSCIN
NTSC mode
3.58
MHz
PAL mode
4.43
MHz
Input amplitude
V
IN
XIN1, XIN2, 4FSC2, FSCIN:
sine wave, capacitive coupling
0.3
5
Vp-p
Reset pulse width
t
WRES
RESET
400
ns
Parameter
Symbol
Conditions
min
typ
max
Unit
Current drain
I
DD
(1)
I
DD
(2)
V
DD
1
V
DD
S1, S2, SFSY, PW, SBSY, CE, DI, CL, MUTE, LINE,
HRESET, VRESET, N/P1, N/P2, RESET, SON:
V
IN
= V
DD
CB, TEST, TEST1, DEN: V
IN
= V
DD
S1, S2, SFSY, PW, SBSY, CE, DI, CL, MUTE, LINE,
HRESET, VRESET, N/P1, N/P2, RESET, SON:
V
IN
= V
SS
PALID: V
IN
= V
SS
SBCK, WE, RAS, CAS, OE, A0 to A7, DB0 to DB3,
CDGM, TRANS0 to TRANS5, VSYNC, YS, CSYNC,
EFLG, FSX, FSC: I
O
= –0.5 mA
24
40
mA
12
20
mA
Input high level current
I
IH
(1)
5
μA
I
IH
(2)
30
100
200
μA
Input low level current
V
IL
(1)
–5
μA
V
IL
(2)
–200
–100
–30
μA
Output high level voltage
V
OH
V
DD
– 1
V
DD
V
Continued on next page.
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