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參數(shù)資料
| 型號(hào)： | LC78626KE |
| 廠商： | Sanyo Electric Co.,Ltd. |
| 英文描述： | Compact Disc Player DSP(用于CD播放器的8位DSP) |
| 中文描述： | 光碟機(jī)的DSP（用于光盤播放器的8位數(shù)字信號(hào)處理器） |
| 文件頁數(shù)： | 10/34頁 |
| 文件大小： | 387K |
| 代理商： | LC78626KE |
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No. 5995-10/34
LC78626KE
Continued from preceding page.
Pin
No.
Pin
Name
I/O
Description
Output pin states
during reset
70
MMC0
O
Remaining DRAM output
Low-level output
71
MMC1
O
Remaining DRAM output
Low-level output
72
MMC2
O
Remaining DRAM output
Low-level output
73
MMC3
O
Remaining DRAM output
Low-level output
74
OVF
O
DRAM write terminated. (An RZP pulse is output when there is an overflow or a shock.)
Low-level output
75
CNTOK
O
Data contact point detection complete signal: low
→
high: detection complete. (DRAM write start).
DRAM write enable signal input: high: write enable.
High-level output
76
WOK
I
—
77
PAUSE IN
I
Pause signal input: high: pause.
—
78
AD10/CAS2
O
Undefined
79
EMPN
O
Remaining DRAM alarm output: low: memory low.
Low-level output
80
SHOCK
I
C2F shock detect pause signal input: low: pause shock detection.
—
81
DRAM3
I/O
DRAM data bus
Input mode
82
DRAM2
I/O
DRAM data bus
Input mode
83
DRAM1
I/O
DRAM data bus
Input mode
84
DRAM0
I/O
DRAM data bus
Input mode
85
OE
O
DRAM control signal
Low-level output
86
WE
O
DRAM control signal
High-level output
87
CAS
O
DRAM control signal
Undefined
88
RAS
O
DRAM control signal
Undefined
89
AD9
O
DRAM address bus
Low-level output
90
AD8
O
DRAM address bus
Low-level output
91
AD7
O
DRAM address bus
Low-level output
92
AD6
O
DRAM address bus
Low-level output
93
AD5
O
DRAM address bus
Low-level output
94
V
SS
AD4
P
Digital system ground. Must be connected to 0 V.
—
95
O
DRAM address bus
Low-level output
96
AD3
O
DRAM address bus
Low-level output
97
AD2
O
DRAM address bus
Low-level output
98
AD1
O
DRAM address bus
Undefined
99
AD0
O
DRAM address bus
Undefined
100
V
DD
P
Digital system power supply
—
Shared function pin that functions either as a 16M DRAM address output (AD10) or as a DRAM control
signal (CAS2) used when 8M of DRAM (two 4M DRAM chips) is used. The function is switched by the
DRAM selection pins MR1 and MR2.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| LC78626 | 16-bit fixed point DSP with Flash |
| LC78626E | 16-bit fixed point DSP with Flash |
| LC78628 | 16-bit fixed point DSP with Flash |
| LC78628E | 16-bit fixed point DSP with Flash |
| LC78630 | 16-bit fixed point DSP with Flash |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| LC78628 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disc Player DSP with Built-in HDCD Decoder |
| LC78628E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disc Player DSP with Built-in HDCD Decoder |
| LC7863 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:DIGITAL SIGNAL PROCESSOR FOR COMPACT DISC PLAYERS |
| LC78630 | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
| LC78630E | 制造商:SANYO 制造商全稱:Sanyo Semicon Device 功能描述:Compact Disk Player DSP |
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