
Continued from preceding page.
Blank entry: Illegal command, #: Changed or added command, *: latching commands (mode setting commands),
G
G
: Commands shared with an ASP (LA9230M/31M or other processor), Items in parentheses are ASP commands
(provided for reference purposes)
No. 5223-32/34
LC78621E
1 0 0 0 0 0 0 0
*
#ATT 0 dB SET
1 0 1 0 0 0 0 0
*
Old TRK JMP
1 1 0 0 0 0 0 0
1 1 1 0 0 0 0 0
1 0 0 0 0 0 0 1
*
#ATT DATA SET
1 0 1 0 0 0 0 1
*
New TRK JMP
1 1 0 0 0 0 0 1
*
Double-speed
playback
1 1 1 0 0 0 0 1
1 0 0 0 0 0 1 0
*
#ATT 4STP UP
1 0 1 0 0 0 1 0
FOCS START #2
1 1 0 0 0 0 1 0
*
Normal-speed
playback
1 1 1 0 0 0 1 0
1 0 0 0 0 0 1 1
*
#ATT 4STP DWN
1 0 1 0 0 0 1 1
*
Internal BRKE
CONT
1 1 0 0 0 0 1 1
1 1 1 0 0 0 1 1
1 0 0 0 0 1 0 0
*
#ATT 8STP UP
1 0 1 0 0 1 0 0
1 1 0 0 0 1 0 0
*
Internal BRK OFF
1 1 1 0 0 1 0 0
1 0 0 0 0 1 0 1
*
#ATT 8STP DWN
1 0 1 0 0 1 0 1
1 1 0 0 0 1 0 1
*
Internal BRK ON
1 1 1 0 0 1 0 1
1 0 0 0 0 1 1 0
*
#ATT 16STP UP
1 0 1 0 0 1 1 0
1 1 0 0 0 1 1 0
1 1 1 0 0 1 1 0
1 0 0 0 0 1 1 1
*
#ATT 16STP DWN
1 0 1 0 0 1 1 1
1 1 0 0 0 1 1 1
1 1 1 0 0 1 1 1
1 0 0 0 1 0 0 0
*
CDROMXA
1 0 1 0 1 0 0 0
*
DISC 8 SET
1 1 0 0 1 0 0 0
1 1 1 0 1 0 0 0
1 0 0 0 1 0 0 1
*
ADDRESS 1
1 0 1 0 1 0 0 1
*
DISC 12 SET
1 1 0 0 1 0 0 1
*
#CK2 polarity
inverted
1 1 1 0 1 0 0 1
1 0 0 0 1 0 1 0
*
LASER OFF
1 0 1 0 1 0 1 0
1 1 0 0 1 0 1 0
*
Internal BRK-DMC 1 1 1 0 1 0 1 0
low
1 0 0 0 1 0 1 1
*
CONT, ROMXA
1 0 1 0 1 0 1 1
1 1 0 0 1 0 1 1
*
Internal BRK-DMC
high
1 1 1 0 1 0 1 1
RST
1 0 0 0 1 1 0 0
TRACK JMP BRK
1 0 1 0 1 1 0 0
1 1 0 0 1 1 0 0
*
TOFF during
internal BRK
1 1 1 0 1 1 0 0
1 0 0 0 1 1 0 1
*
OSC OFF
1 0 1 0 1 1 0 1
1 1 0 0 1 1 0 1
*
TON during
internal BRK
1 1 1 0 1 1 0 1
1 0 0 0 1 1 1 0
*
OSC ON
1 0 1 0 1 1 1 0
1 1 0 0 1 1 1 0
1 1 1 0 1 1 1 0
*
Command noise
OFF
1 0 0 0 1 1 1 1
*
TRACKING ON
1 0 1 0 1 1 1 1
1 1 0 0 1 1 1 1
1 1 1 0 1 1 1 1
*
Command noise
ON
1 0 0 1 0 0 0 0 (
*
F.OFF.ADJ.ST)
1 0 1 1 0 0 0 0
*
CLV-PH 1/1 mode
1 1 0 1 0 0 0 0
1 1 1 1 0 0 0 0
*
G
G
TRCK CHECK
IN
(2BYTEDETECT)
1 0 0 1 0 0 0 1 (
*
F.OFF.ADJ.OFF)
1 0 1 1 0 0 0 1
*
CLV-PH 1/2 mode
1 1 0 1 0 0 0 1
1 1 1 1 0 0 0 1
1 0 0 1 0 0 1 0 (
*
T.OFF.ADJ.ST)
1 0 1 1 0 0 1 0
*
CLV-PH 1/4 mode
1 1 0 1 0 0 1 0
1 1 1 1 0 0 1 0
1 0 0 1 0 0 1 1 (
*
T.OFF.ADJ.OFF)
1 0 1 1 0 0 1 1
*
CLV-PH 1/8 mode
1 1 0 1 0 0 1 1
1 1 1 1 0 0 1 1
1 0 0 1 0 1 0 0 (
*
LSR.ON)
1 0 1 1 0 1 0 0
*
CLV3ST output ON 1 1 0 1 0 1 0 0
1 1 1 1 0 1 0 0
1 0 0 1 0 1 0 1 (
*
LSR.OF/F.SV.ON) 1 0 1 1 0 1 0 1
*
CLV3ST output
OFF
1 1 0 1 0 1 0 1
1 1 1 1 0 1 0 1
1 0 0 1 0 1 1 0 (
*
LSR.OF/F.SV.OF)
1 0 1 1 0 1 1 0
*
JP3ST output ON
1 1 0 1 0 1 1 0
1 1 1 1 0 1 1 0
1 0 0 1 0 1 1 1 (
*
SP.8CM)
1 0 1 1 0 1 1 1
*
JP3ST output OFF
1 1 0 1 0 1 1 1
1 1 1 1 0 1 1 1
1 0 0 1 1 0 0 0 (
*
SP.12CM)
1 0 1 1 1 0 0 0
1 1 0 1 1 0 0 0
1 1 1 1 1 0 0 0
*
G
G
TRCK CHECK
OUT
(2BYTE DETECT)
1 0 0 1 1 0 0 1 (
*
SP.OFF)
1 0 1 1 1 0 0 1
1 1 0 1 1 0 0 1
1 1 1 1 1 0 0 1
1 0 0 1 1 0 1 0 (
*
SLED.ON)
1 0 1 1 1 0 1 0
1 1 0 1 1 0 1 0
1 1 1 1 1 0 1 0
1 0 0 1 1 0 1 1 (
*
SLED.OFF)
1 0 1 1 1 0 1 1
1 1 0 1 1 0 1 1
1 1 1 1 1 0 1 1
1 0 0 1 1 1 0 0 (
*
EF.BAL.START)
1 0 1 1 1 1 0 0
1 1 0 1 1 1 0 0
1 1 1 1 1 1 0 0
1 0 0 1 1 1 0 1 (
*
T.SERVO.OFF)
1 0 1 1 1 1 0 1
1 1 0 1 1 1 0 1
1 1 1 1 1 1 0 1
1 0 0 1 1 1 1 0 (
*
T.SERVO.ON)
1 0 1 1 1 1 1 0
1 1 0 1 1 1 1 0
1 1 1 1 1 1 1 0
#
G
G
NOTHING
1 0 0 1 1 1 1 1
1 0 1 1 1 1 1 1
1 1 0 1 1 1 1 1
1 1 1 1 1 1 1 1
*
G
G
2BYTE CMD
RST