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參數(shù)資料
| 型號： | LC72136NM |
| 元件分類： | PLL合成/DDS/VCOs |
| 英文描述： | PLL FREQUENCY SYNTHESIZER, 40 MHz, PDSO24 |
| 封裝： | MFP-24 |
| 文件頁數(shù)： | 15/23頁 |
| 文件大?。?/td> | 318K |
| 代理商： | LC72136NM |
No. 5608-22/23
LC72136N, 72136NM
4. DO Pin Usage Techniques
In addition to data output mode times, the DO pin can also be used to check for IF counter count completion and for
unlock detection output. Also, an input pin state can be output unchanged through the DO pin and input to the
controller.
5. Power Supply Pins
A capacitor of at least 2000 pF must be inserted between the power supply VDD and VSS pins for noise exclusion.
This capacitor must be placed as close as possible to the VDD and VSS pins.
Pin States Following a Power-On Reset
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