參數(shù)資料
型號: LC72135M
廠商: Sanyo Electric Co.,Ltd.
英文描述: PLL Frequency Synthesizer for Electronic Tuning(用于電子調(diào)諧的鎖相環(huán)頻率合成器)
中文描述: 鎖相環(huán)頻率合成器電子調(diào)諧(用于電子調(diào)諧的鎖相環(huán)頻率合成器)
文件頁數(shù): 20/24頁
文件大小: 300K
代理商: LC72135M
2. Unlock Detection Software
Figure 3
3. Unlocked State Data Output Using Serial Data Output
In the LC72135M, once an unlocked state occurs, the unlocked state serial data (UL) will not be reset until a data
input (or output) operation is performed. At the data output
x
point in Figure 3, although the VCO frequency has
stabilized (locked), since no data output has been performed since the divisor N was changed the unlocked state data
remains in the unlocked state. As a result, even though the frequency has stabilized (locked), the system remains
(from the standpoint of the data) in the unlocked state.
Therefore, the unlocked state data acquired at data output
x
, which occurs immediately after the divisor N was
changed, should be treated as a dummy data output and ignored. The second data output (data output
) and
following outputs are valid data.
Locked State Determination Flowchart
4. Directly Outputting Unlocked State Data from the DO Pin (Set by the DO pin control data)
Since the locking state (high = locked, low = unlocked) is output directly from the DO pin, the dummy data
processing described in section 3 above is not required. After changing the divisor N, the locking state can be
checked after waiting at least two reference frequency periods.
No. 5175-20/24
LC72135M
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